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Date: Thu, 11 Sep 2025 14:30:42 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>, "Lad, Prabhakar"
<prabhakar.csengg@...il.com>
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Subject: RE: [PATCH v8 2/6] clk: renesas: rzv2h-cpg: Add support for DSI
clocks
Hi Tomi,
> -----Original Message-----
> From: Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>
> Sent: 11 September 2025 15:26
> Subject: Re: [PATCH v8 2/6] clk: renesas: rzv2h-cpg: Add support for DSI clocks
>
> Hi,
>
>
> In fact, if the DSI is so picky about the rate, I find the HW design
> odd: in g2l the pixel clock and the DSI clock come from a single source, which keeps them neatly in
> sync. If that is required, why change the design here so that the DSI PLL is independent of the pixel
> clock, yet still the DSI PLL must be programmed to be exactly matched to the pixel clock.
G2L DSI is from Renesas where as V2H from different vendor. Hence the difference.
Cheers,
Biju
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