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Message-ID: <ea57a466-97b3-49d4-8d1c-142fd49a0da2@linaro.org>
Date: Fri, 12 Sep 2025 01:03:06 +0200
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: David Lechner <dlechner@...libre.com>, jic23@...nel.org,
 nuno.sa@...log.com, andy@...nel.org, robh@...nel.org, conor+dt@...nel.org,
 krzk+dt@...nel.org
Cc: linux-iio@...r.kernel.org, s32@....com, linux-kernel@...r.kernel.org,
 devicetree@...r.kernel.org, chester62515@...il.com, mbrugger@...e.com,
 ghennadi.procopciuc@....nxp.com
Subject: Re: [PATCH v2 2/2] iio: adc: Add the NXP SAR ADC support for the
 s32g2/3 platforms


Hi David,


On 11/09/2025 22:10, David Lechner wrote:
> On 9/10/25 10:57 AM, Daniel Lezcano wrote:

[ ... ]

>> +		/* iio_push_to_buffers_with_timestamp should not be called
>> +		 * with dma_samples as parameter. The samples will be smashed
>> +		 * if timestamp is enabled.
>> +		 */
>> +		timestamp = iio_get_time_ns(indio_dev);
>> +		ret = iio_push_to_buffers_with_timestamp(indio_dev,
>> +							 info->buffer,
>> +							 timestamp);
> 
> Is it OK to call this with spinlock held? It looks like it can call
> devm_krealloc() which may sleep.
> 

It should be ok, devm_krealloc is in the code path of 
iio_push_to_buffers_with_ts_unaligned(), not in 
iio_push_to_buffers_with_timestamp()

> ...
> 
>> +static int nxp_sar_adc_probe(struct platform_device *pdev)
>> +{
>> +	const struct nxp_sar_adc_data *data;
>> +	struct nxp_sar_adc *info;
>> +	struct iio_dev *indio_dev;
>> +	struct resource *mem;
>> +	struct device *dev = &pdev->dev;
>> +	int irq;
>> +	int ret;
>> +
>> +	indio_dev = devm_iio_device_alloc(dev, sizeof(struct nxp_sar_adc));
>> +	if (!indio_dev)
>> +		return -ENOMEM;
>> +
>> +	info = iio_priv(indio_dev);
>> +
>> +	data = device_get_match_data(dev);
>> +
>> +	info->vref_mV = data->vref_mV;
>> +
>> +	info->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem);
>> +	if (IS_ERR(info->regs))
>> +		return dev_err_probe(dev, PTR_ERR(info->regs),
>> +				     "failed to get and remap resource");
>> +
>> +	irq = platform_get_irq(pdev, 0);
>> +	if (irq < 0)
>> +		return irq;
>> +
>> +	ret = devm_request_irq(dev, irq, nxp_sar_adc_isr, 0,
>> +			       dev_name(dev), indio_dev);
>> +	if (ret < 0)
>> +		return dev_err_probe(dev, ret, "failed requesting irq, irq = %d\n", irq);
>> +
>> +	info->regs_phys = mem->start;
>> +	spin_lock_init(&info->lock);
>> +
>> +	info->clk = devm_clk_get_enabled(dev, "adc");
> 
> clock-names was dropped from bindings, so name should be NULL.

Right, I found it when I removed the clock-names from the DT :)

> 
>> +static const struct nxp_sar_adc_data s32g2_sar_adc_data = { .vref_mV = 1800 };
> 
> Why have this if there is only one option?

There will be the ADC model name/variant in V3.

Thanks!

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