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Message-ID: <20250911114451.15947-1-devendra.verma@amd.com>
Date: Thu, 11 Sep 2025 17:14:49 +0530
From: Devendra K Verma <devendra.verma@....com>
To: <bhelgaas@...gle.com>, <mani@...nel.org>, <vkoul@...nel.org>
CC: <dmaengine@...r.kernel.org>, <linux-pci@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <michal.simek@....com>
Subject: [PATCH v1 0/2] Add AMD MDB Endpoint and non-LL mode Support
This series of patch support the following:
- AMD MDB Endpoint Support, as part of this patch following are
added:
o AMD supported device ID and vendor ID (Xilinx)
o AMD MDB specific driver data
o AMD specific VSEC capabilities to retrieve the base of
phys address of MDB side DDR
o Logic to assign the offsets to LL and data blocks if
more number of channels are enabled than configured
in the given pci_data struct.
- Addition of non-LL mode
o The IP supported non-LL mode functions
o Flexibility to choose non-LL mode via dma_slave_config
param peripheral_config, by the client
o Allow IP utilization if LL mode is not available
Devendra K Verma (2):
dmaengine: dw-edma: Add AMD MDB Endpoint Support
dmaengine: dw-edma: Add non-LL mode
drivers/dma/dw-edma/dw-edma-core.c | 38 ++++++--
drivers/dma/dw-edma/dw-edma-core.h | 1 +
drivers/dma/dw-edma/dw-edma-pcie.c | 162 ++++++++++++++++++++++++++++++++--
drivers/dma/dw-edma/dw-hdma-v0-core.c | 62 ++++++++++++-
include/linux/dma/edma.h | 1 +
5 files changed, 251 insertions(+), 13 deletions(-)
--
1.8.3.1
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