linux-kernel - [PATCH 2/4] pcie: s32g: Add Phy clock definition

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Message-ID: <20250912141436.2347852-3-vincent.guittot@linaro.org>
Date: Fri, 12 Sep 2025 16:14:34 +0200
From: Vincent Guittot <vincent.guittot@...aro.org>
To: chester62515@...il.com,
	mbrugger@...e.com,
	ghennadi.procopciuc@....nxp.com,
	s32@....com,
	lpieralisi@...nel.org,
	kwilczynski@...nel.org,
	mani@...nel.org,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	Ionut.Vicovan@....com,
	larisa.grigore@....com,
	Ghennadi.Procopciuc@....com,
	ciprianmarian.costea@....com,
	bogdan.hamciuc@....com,
	linux-arm-kernel@...ts.infradead.org,
	linux-pci@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH 2/4] pcie: s32g: Add Phy clock definition

From: Ciprian Costea <ciprianmarian.costea@....com>

Define the list of Clock mode supported by PCIe

Signed-off-by: Ciprian Costea <ciprianmarian.costea@....com>
Signed-off-by: Vincent Guittot <vincent.guittot@...aro.org>
---
 include/linux/pcie/nxp-s32g-pcie-phy-submode.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 include/linux/pcie/nxp-s32g-pcie-phy-submode.h

diff --git a/include/linux/pcie/nxp-s32g-pcie-phy-submode.h b/include/linux/pcie/nxp-s32g-pcie-phy-submode.h
new file mode 100644
index 000000000000..2b96b5fd68c0
--- /dev/null
+++ b/include/linux/pcie/nxp-s32g-pcie-phy-submode.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/**
+ * Copyright 2021, 2025 NXP
+ */
+#ifndef NXP_S32G_PCIE_PHY_SUBMODE_H
+#define NXP_S32G_PCIE_PHY_SUBMODE_H
+
+enum pcie_phy_mode {
+	CRNS = 0, /* Common Reference Clock, No Spread Spectrum */
+	CRSS = 1, /* Common Reference Clock, Spread Spectrum */
+	SRNS = 2, /* Separate Reference Clock, No Spread Spectrum */
+	SRIS = 3  /* Separate Reference Clock, Independent Spread Spectrum */
+};
+
+#endif
-- 
2.43.0