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Message-ID: <zjmf27y5i6ypba3nvsxxceuxn6yogp46lmtrjua37qa4ibrleq@4qv5s2wirgdh>
Date: Mon, 15 Sep 2025 23:08:40 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Bjorn Andersson <bjorn.andersson@....qualcomm.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] arm64: dts: qcom: qcm6490: Introduce the Particle
Tachyon
On Fri, Sep 12, 2025 at 01:13:17PM +0200, Konrad Dybcio wrote:
> On 9/11/25 1:05 AM, Bjorn Andersson wrote:
> > The Particle Tachyon is a single board computer with 5G connectivity
> > with AI accelerator, based on the Qualcomm QCM6490 platform.
> >
> > Introduce the board, with support for UFS, USB, USB Type-C PD and
> > altmode (DisplayPort), GPU, charger/battery status, PCIe shield,
> > SD-card, and remoteprocs.
> >
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@....qualcomm.com>
> > ---
>
> [...]
>
> > + leds {
> > + compatible = "gpio-leds";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&activity_led_state>;
>
> property-n
> property-names
>
> is preferred, file-wide (you currently have a mixture)
>
> [...]
>
> > +
> > +&i2c1 {
> > + status = "okay";
>
> This likely results in a "falling back to 100 KHz" warning/notice,
> please specify the bus speed explicitly
>
> [...]
>
> > +&mdss_dp_out {
> > + data-lanes = <0 1>;
>
> Is 2 lanes a hw limitation?
>
[ 20.947242] [drm:msm_dp_ctrl_link_train_1_2 [msm]] *ERROR* max v_level reached
[ 20.955002] [drm:msm_dp_ctrl_link_train_1_2 [msm]] *ERROR* link training #1 on phy 0 failed. ret=-11
[ 20.964702] [drm:msm_dp_ctrl_setup_main_link [msm]] *ERROR* link training on sink failed. ret=-11
I believe I saw the same problem on Rb3Gen2. Do we know if there's any
sc7280 that has working 4-lane DP, or are we perhaps missing something
in the PHY sequences?
Regards,
Bjorn
> [...]
>
> > +&pmk8350_rtc {
>
> I see no reason for RTC not to be enabled by default
>
> [...]
>
> > +&pon_pwrkey {
>
> Same here> + status = "okay";
> > +};
>
>
> > +&uart7 {
> > + /delete-property/interrupts;
>
> /delete-property/(space)interrupts, please
>
> (yes we desperately need a formatter)
>
> [...]
>
> > +&usb_1_qmpphy {
> > + vdda-phy-supply = <&vreg_l6b_1p2>;
> > + vdda-pll-supply = <&vreg_l1b_0p912>;
> > +
> > + orientation-switch;
>
> This is specified in the SoC DTSI
>
> [...]
>
> > +&usb_dp_qmpphy_dp_in {
> > + remote-endpoint = <&mdss_dp_out>;
> > +};
>
> And so is this link
>
> > +
> > +&usb_dp_qmpphy_out {
> > + remote-endpoint = <&pmic_glink_ss_in>;
> > +};
> > +
> > +&usb_dp_qmpphy_usb_ss_in {
> > + remote-endpoint = <&usb_1_dwc3_ss>;
> > +};
>
> And this one
>
> Konrad
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