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Message-ID: <49d6c554-e6ed-4c86-8946-be2cdba659d0@oss.qualcomm.com>
Date: Tue, 16 Sep 2025 13:11:34 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Nihal Kumar Gupta <quic_nihalkum@...cinc.com>,
Rob Herring <robh@...nel.org>,
Vikram Sharma <quic_vikramsa@...cinc.com>
Cc: vladimir.zapolskiy@...aro.org, bryan.odonoghue@...aro.org,
mchehab@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
andersson@...nel.org, konradybcio@...nel.org, hverkuil-cisco@...all.nl,
cros-qcom-dts-watchers@...omium.org, catalin.marinas@....com,
will@...nel.org, linux-arm-kernel@...ts.infradead.org,
quic_svankada@...cinc.com, linux-media@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Ravi Shankar <quic_rshankar@...cinc.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: i2c: qcom-cci: Document qcs8300
compatible
On 9/16/25 1:07 PM, Nihal Kumar Gupta wrote:
>
>
> On 16-09-2025 08:18, Rob Herring wrote:
>> On Fri, Sep 12, 2025 at 07:41:32PM +0530, Vikram Sharma wrote:
>>> From: Nihal Kumar Gupta <quic_nihalkum@...cinc.com>
>>>
>>> Add device tree bindings for the CCI controller on the
>>> Qualcomm QCS8300 SoC.
>>> Introduce the "qcom,qcs8300-cci" compatible string.
>> Wrap commit messages at 72 chars. And explain how it's the same or
>> different from existing SoCs in the commit message. Don't explain the
>> diff. We can read that ourselves.
>>
>
> SA8775P(Lemans) has 4 CCIs, while QCS8300 (Monaco) has 3 CCI, with the
> only difference being the GPIOs used for SDA/SCL pins.
>
> Currently, the CCI driver probe happens through the "qcom,msm8996-cci"
> compatible string. Could we use the existing SA8775P compatible string
> "qcom,sa8775p-cci" or we should remove it?
>
> Please advise on the preferred approach for upstream compliance.
Try:
"""
The three instances of CCI found on the QCS8300 are functionally
the same as on a number of existing Qualcomm SoCs.
Introduce a new SoC-specific compatible, with a common fallback.
"""
Konrad
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