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Message-ID: <d2d17266-68a1-4a63-954b-9076db5315a5@oss.qualcomm.com>
Date: Wed, 17 Sep 2025 19:00:43 +0530
From: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>,
Wasim Nazir <wasim.nazir@....qualcomm.com>
Cc: Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Richard Cochran <richardcochran@...il.com>,
Bartosz Golaszewski <brgl@...ev.pl>, kernel@....qualcomm.com,
linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
netdev@...r.kernel.org, linux-i2c@...r.kernel.org,
Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
Subject: Re: [PATCH v5 05/10] arm64: dts: qcom: lemans-evk: Enable PCIe
support
On 9/17/2025 1:36 PM, Manivannan Sadhasivam wrote:
> On Tue, Sep 16, 2025 at 04:16:53PM GMT, Wasim Nazir wrote:
>> From: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
>>
>> Enable PCIe0 and PCIe1 along with the respective phy-nodes.
>>
>> PCIe0 is routed to an m.2 E key connector on the mainboard for wifi
>> attaches while PCIe1 routes to a standard PCIe x4 expansion slot.
>>
>
> Where did you define the supply for M.2 connector? We don't have a proper
> binding for M.2 today, but atleast the supply should be modeled as a fixed
> regulator with EN GPIOs as like other boards.
>
> - Mani
Hi Mani,
This board doesn't have any power supply for m.2 connector they are
always powered on.
- Krishna Chaitanya.
>
>> Signed-off-by: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
>> Signed-off-by: Wasim Nazir <wasim.nazir@....qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/lemans-evk.dts | 82 +++++++++++++++++++++++++++++++++
>> 1 file changed, 82 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts
>> index 97428d9e3e41..99400ff12cfd 100644
>> --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts
>> +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts
>> @@ -431,6 +431,40 @@ &mdss0_dp1_phy {
>> status = "okay";
>> };
>>
>> +&pcie0 {
>> + perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
>> + wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
>> +
>> + pinctrl-0 = <&pcie0_default_state>;
>> + pinctrl-names = "default";
>> +
>> + status = "okay";
>> +};
>> +
>> +&pcie0_phy {
>> + vdda-phy-supply = <&vreg_l5a>;
>> + vdda-pll-supply = <&vreg_l1c>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&pcie1 {
>> + perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
>> + wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
>> +
>> + pinctrl-0 = <&pcie1_default_state>;
>> + pinctrl-names = "default";
>> +
>> + status = "okay";
>> +};
>> +
>> +&pcie1_phy {
>> + vdda-phy-supply = <&vreg_l5a>;
>> + vdda-pll-supply = <&vreg_l1c>;
>> +
>> + status = "okay";
>> +};
>> +
>> &qupv3_id_0 {
>> status = "okay";
>> };
>> @@ -447,6 +481,54 @@ &sleep_clk {
>> clock-frequency = <32768>;
>> };
>>
>> +&tlmm {
>> + pcie0_default_state: pcie0-default-state {
>> + clkreq-pins {
>> + pins = "gpio1";
>> + function = "pcie0_clkreq";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> +
>> + perst-pins {
>> + pins = "gpio2";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> +
>> + wake-pins {
>> + pins = "gpio0";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> + };
>> +
>> + pcie1_default_state: pcie1-default-state {
>> + clkreq-pins {
>> + pins = "gpio3";
>> + function = "pcie1_clkreq";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> +
>> + perst-pins {
>> + pins = "gpio4";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> +
>> + wake-pins {
>> + pins = "gpio5";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> + };
>> +};
>> +
>> &uart10 {
>> compatible = "qcom,geni-debug-uart";
>> pinctrl-0 = <&qup_uart10_default>;
>>
>> --
>> 2.51.0
>>
>
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