[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <aMwoxsACdicpAFup@lizhi-Precision-Tower-5810>
Date: Thu, 18 Sep 2025 11:44:06 -0400
From: Frank Li <Frank.li@....com>
To: Durai Manickam KR <durai.manickamkr@...rochip.com>
Cc: linux-i3c@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, alexandre.belloni@...tlin.com,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
balamanikandan.gunasundar@...rochip.com,
nicolas.ferre@...rochip.com
Subject: Re: [PATCH 4/4] ARM: dts: microchip: add I3C controller
On Thu, Sep 18, 2025 at 03:24:29PM +0530, Durai Manickam KR wrote:
> Add I3C controller for sama7d65 SoC.
>
> Signed-off-by: Durai Manickam KR <durai.manickamkr@...rochip.com>
> ---
> arch/arm/boot/dts/microchip/sama7d65.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> index c191acc2c89f..3a5da27f7d83 100644
> --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
> +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> @@ -721,5 +721,17 @@ gic: interrupt-controller@...11000 {
> #address-cells = <0>;
> interrupt-controller;
> };
> +
> + i3c: i3c@...00000 {
> + compatible = "mchp,sama7d65-i3c-hci";
Need update binding doc for "mchp,sama7d65-i3c-hci"
Frank
> + reg = <0xe9000000 0x300>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 105>, <&pmc PMC_TYPE_GCK 105>;
> + clock-names = "pclk", "gclk";
> + assigned-clocks = <&pmc PMC_TYPE_GCK 105>;
> + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_ETHPLL>;
> + assigned-clock-rates = <125000000>;
> + status = "disabled";
> + };
> };
> };
> --
> 2.34.1
>
Powered by blists - more mailing lists