linux-kernel - [PATCH 1/2] dt-bindings: gpio: Add Tegra410 support

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Message-ID: <20250919093627.605059-1-kkartik@nvidia.com>
Date: Fri, 19 Sep 2025 15:06:26 +0530
From: Kartik Rajput <kkartik@...dia.com>
To: <linus.walleij@...aro.org>, <brgl@...ev.pl>, <thierry.reding@...il.com>,
	<jonathanh@...dia.com>, <robh@...nel.org>, <krzk+dt@...nel.org>,
	<conor+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
	<linux-gpio@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
	<devicetree@...r.kernel.org>
CC: Prathamesh Shete <pshete@...dia.com>, Kartik Rajput <kkartik@...dia.com>
Subject: [PATCH 1/2] dt-bindings: gpio: Add Tegra410 support

From: Prathamesh Shete <pshete@...dia.com>

Add the port definitions for the main GPIO controller found on
Tegra410.

Signed-off-by: Prathamesh Shete <pshete@...dia.com>
Signed-off-by: Kartik Rajput <kkartik@...dia.com>
---
 include/dt-bindings/gpio/tegra410-gpio.h | 37 ++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 include/dt-bindings/gpio/tegra410-gpio.h

diff --git a/include/dt-bindings/gpio/tegra410-gpio.h b/include/dt-bindings/gpio/tegra410-gpio.h
new file mode 100644
index 000000000000..e4d042fbacb2
--- /dev/null
+++ b/include/dt-bindings/gpio/tegra410-gpio.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */
+
+/*
+ * This header provides constants for the nvidia,tegra410-gpio DT binding.
+ *
+ * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
+ * provide names for this.
+ *
+ * The second cell contains standard flag values specified in gpio.h.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_TEGRA410_GPIO_H
+#define _DT_BINDINGS_GPIO_TEGRA410_GPIO_H
+
+#include <dt-bindings/gpio/gpio.h>
+
+/* GPIOs implemented by main GPIO controller */
+#define TEGRA410_MAIN_GPIO_PORT_A	0
+#define TEGRA410_MAIN_GPIO_PORT_B	1
+#define TEGRA410_MAIN_GPIO_PORT_C	2
+#define TEGRA410_MAIN_GPIO_PORT_D	3
+#define TEGRA410_MAIN_GPIO_PORT_E	4
+#define TEGRA410_MAIN_GPIO_PORT_I	5
+#define TEGRA410_MAIN_GPIO_PORT_J	6
+#define TEGRA410_MAIN_GPIO_PORT_K	7
+#define TEGRA410_MAIN_GPIO_PORT_L	8
+#define TEGRA410_MAIN_GPIO_PORT_M	9
+#define TEGRA410_MAIN_GPIO_PORT_N	10
+#define TEGRA410_MAIN_GPIO_PORT_P	11
+#define TEGRA410_MAIN_GPIO_PORT_Q	12
+#define TEGRA410_MAIN_GPIO_PORT_R	13
+
+#define TEGRA410_MAIN_GPIO(port, offset) \
+	((TEGRA410_MAIN_GPIO_PORT_##port * 8) + (offset))
+
+#endif
-- 
2.43.0