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Message-ID: <20250919093627.605059-2-kkartik@nvidia.com>
Date: Fri, 19 Sep 2025 15:06:27 +0530
From: Kartik Rajput <kkartik@...dia.com>
To: <linus.walleij@...aro.org>, <brgl@...ev.pl>, <thierry.reding@...il.com>,
	<jonathanh@...dia.com>, <robh@...nel.org>, <krzk+dt@...nel.org>,
	<conor+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
	<linux-gpio@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
	<devicetree@...r.kernel.org>
CC: Prathamesh Shete <pshete@...dia.com>, Kartik Rajput <kkartik@...dia.com>
Subject: [PATCH 2/2] gpio: tegra186: Add support for Tegra410

From: Prathamesh Shete <pshete@...dia.com>

Extend the existing Tegra186 GPIO controller driver with support for the
GPIO controller found on Tegra410. While the programming model remains
the same, the number of pins has slightly changed.

Signed-off-by: Prathamesh Shete <pshete@...dia.com>
Signed-off-by: Kartik Rajput <kkartik@...dia.com>
---
 drivers/gpio/gpio-tegra186.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c
index 4d3db6e06eeb..68bc25b7d106 100644
--- a/drivers/gpio/gpio-tegra186.c
+++ b/drivers/gpio/gpio-tegra186.c
@@ -21,6 +21,7 @@
 #include <dt-bindings/gpio/tegra234-gpio.h>
 #include <dt-bindings/gpio/tegra241-gpio.h>
 #include <dt-bindings/gpio/tegra256-gpio.h>
+#include <dt-bindings/gpio/tegra410-gpio.h>
 
 /* security registers */
 #define TEGRA186_GPIO_CTL_SCR 0x0c
@@ -1304,6 +1305,40 @@ static const struct tegra_gpio_soc tegra256_main_soc = {
 	.has_vm_support = true,
 };
 
+#define TEGRA410_MAIN_GPIO_PORT(_name, _bank, _port, _pins)	\
+	[TEGRA410_MAIN_GPIO_PORT_##_name] = {			\
+		.name = #_name,					\
+		.bank = _bank,					\
+		.port = _port,					\
+		.pins = _pins,					\
+	}
+
+static const struct tegra_gpio_port tegra410_main_ports[] = {
+	TEGRA410_MAIN_GPIO_PORT(A, 0, 0, 7),
+	TEGRA410_MAIN_GPIO_PORT(B, 0, 1, 8),
+	TEGRA410_MAIN_GPIO_PORT(C, 0, 2, 8),
+	TEGRA410_MAIN_GPIO_PORT(D, 0, 3, 8),
+	TEGRA410_MAIN_GPIO_PORT(E, 0, 4, 6),
+	TEGRA410_MAIN_GPIO_PORT(I, 1, 0, 8),
+	TEGRA410_MAIN_GPIO_PORT(J, 1, 1, 7),
+	TEGRA410_MAIN_GPIO_PORT(K, 1, 2, 7),
+	TEGRA410_MAIN_GPIO_PORT(L, 1, 3, 7),
+	TEGRA410_MAIN_GPIO_PORT(M, 2, 0, 7),
+	TEGRA410_MAIN_GPIO_PORT(N, 2, 1, 6),
+	TEGRA410_MAIN_GPIO_PORT(P, 2, 2, 8),
+	TEGRA410_MAIN_GPIO_PORT(Q, 2, 3, 3),
+	TEGRA410_MAIN_GPIO_PORT(R, 2, 4, 2),
+};
+
+static const struct tegra_gpio_soc tegra410_main_soc = {
+	.num_ports = ARRAY_SIZE(tegra410_main_ports),
+	.ports = tegra410_main_ports,
+	.name = "tegra410-gpio-main",
+	.instance = 1,
+	.num_irqs_per_bank = 8,
+	.has_vm_support = false,
+};
+
 static const struct of_device_id tegra186_gpio_of_match[] = {
 	{
 		.compatible = "nvidia,tegra186-gpio",
@@ -1339,6 +1374,7 @@ static const struct acpi_device_id  tegra186_gpio_acpi_match[] = {
 	{ .id = "NVDA0408", .driver_data = (kernel_ulong_t)&tegra194_aon_soc },
 	{ .id = "NVDA0508", .driver_data = (kernel_ulong_t)&tegra241_main_soc },
 	{ .id = "NVDA0608", .driver_data = (kernel_ulong_t)&tegra241_aon_soc },
+	{ .id = "NVDA0409", .driver_data = (kernel_ulong_t)&tegra410_main_soc },
 	{}
 };
 MODULE_DEVICE_TABLE(acpi, tegra186_gpio_acpi_match);
-- 
2.43.0


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