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Message-ID: <aM6ZNMR0CtDj01Iu@gondor.apana.org.au>
Date: Sat, 20 Sep 2025 20:08:20 +0800
From: Herbert Xu <herbert@...dor.apana.org.au>
To: T Pratham <t-pratham@...com>
Cc: "David S. Miller" <davem@...emloft.net>,
Kamlesh Gurudasani <kamlesh@...com>,
Manorit Chawdhry <m-chawdhry@...com>,
Vignesh Raghavendra <vigneshr@...com>,
Praneeth Bajjuri <praneeth@...com>,
Vishal Mahaveer <vishalm@...com>,
Kavitha Malarvizhi <k-malarvizhi@...com>,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/4] crypto: ti: Add support for AES-XTS in DTHEv2
driver
On Wed, Sep 10, 2025 at 02:46:53PM +0530, T Pratham wrote:
>
> @@ -397,7 +446,29 @@ static struct skcipher_engine_alg cipher_algs[] = {
> .cra_module = THIS_MODULE,
> },
> .op.do_one_request = dthe_aes_run,
> - } /* CBC AES */
> + }, /* CBC AES */
> + {
> + .base.init = dthe_cipher_init_tfm,
> + .base.setkey = dthe_aes_xts_setkey,
> + .base.encrypt = dthe_aes_encrypt,
> + .base.decrypt = dthe_aes_decrypt,
> + .base.min_keysize = AES_MIN_KEY_SIZE * 2,
> + .base.max_keysize = AES_MAX_KEY_SIZE * 2,
> + .base.ivsize = AES_IV_SIZE,
> + .base.base = {
> + .cra_name = "xts(aes)",
> + .cra_driver_name = "xts-aes-dthev2",
> + .cra_priority = 299,
> + .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
> + CRYPTO_ALG_KERN_DRIVER_ONLY,
I think it's missing CRYPTO_ALG_ASYNC.
The existing algorithms seem to be missing this bit too so we
should fix that first.
Thanks,
--
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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