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Message-ID: <20250923174903.76283-12-ada.coupriediaz@arm.com>
Date: Tue, 23 Sep 2025 18:48:58 +0100
From: Ada Couprie Diaz <ada.coupriediaz@....com>
To: linux-arm-kernel@...ts.infradead.org
Cc: Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Marc Zyngier <maz@...nel.org>,
Oliver Upton <oliver.upton@...ux.dev>,
Ard Biesheuvel <ardb@...nel.org>,
Joey Gouly <joey.gouly@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Zenghui Yu <yuzenghui@...wei.com>,
Andrey Ryabinin <ryabinin.a.a@...il.com>,
Alexander Potapenko <glider@...gle.com>,
Andrey Konovalov <andreyknvl@...il.com>,
Dmitry Vyukov <dvyukov@...gle.com>,
Vincenzo Frascino <vincenzo.frascino@....com>,
linux-kernel@...r.kernel.org,
kvmarm@...ts.linux.dev,
kasan-dev@...glegroups.com,
Mark Rutland <mark.rutland@....com>,
Ada Couprie Diaz <ada.coupriediaz@....com>
Subject: [RFC PATCH 11/16] arm64/insn: always inline aarch64_insn_gen_extr()
As it is always called with an explicit variant, we can check for
its validity at compile time and remove the runtime error print.
This makes `aarch64_insn_gen_extr()` safe for inlining
and usage from patching callbacks, as both
`aarch64_insn_encode_immediate()` and `aarch64_insn_encode_register()`
have been made safe in previous commits.
Signed-off-by: Ada Couprie Diaz <ada.coupriediaz@....com>
---
arch/arm64/include/asm/insn.h | 39 ++++++++++++++++++++++++++++++-----
arch/arm64/lib/insn.c | 32 ----------------------------
2 files changed, 34 insertions(+), 37 deletions(-)
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index 6e6a53d4d750..4ba4d5c50137 100644
--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
@@ -1111,12 +1111,41 @@ static __always_inline u32 aarch64_insn_gen_logical_immediate(
return aarch64_encode_immediate(imm, variant, insn);
}
+static __always_inline u32 aarch64_insn_gen_extr(
+ enum aarch64_insn_variant variant,
+ enum aarch64_insn_register Rm,
+ enum aarch64_insn_register Rn,
+ enum aarch64_insn_register Rd,
+ u8 lsb)
+{
+ compiletime_assert(variant == AARCH64_INSN_VARIANT_32BIT ||
+ variant == AARCH64_INSN_VARIANT_64BIT,
+ "unknown variant encoding");
+ u32 insn;
+
+ insn = aarch64_insn_get_extr_value();
+
+ switch (variant) {
+ case AARCH64_INSN_VARIANT_32BIT:
+ if (lsb > 31)
+ return AARCH64_BREAK_FAULT;
+ break;
+ case AARCH64_INSN_VARIANT_64BIT:
+ if (lsb > 63)
+ return AARCH64_BREAK_FAULT;
+ insn |= AARCH64_INSN_SF_BIT;
+ insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_N, insn, 1);
+ break;
+ default:
+ return AARCH64_BREAK_FAULT;
+ }
+
+ insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_S, insn, lsb);
+ insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, Rd);
+ insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, Rn);
+ return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, Rm);
+}
-u32 aarch64_insn_gen_extr(enum aarch64_insn_variant variant,
- enum aarch64_insn_register Rm,
- enum aarch64_insn_register Rn,
- enum aarch64_insn_register Rd,
- u8 lsb);
#ifdef CONFIG_ARM64_LSE_ATOMICS
u32 aarch64_insn_gen_atomic_ld_op(enum aarch64_insn_register result,
enum aarch64_insn_register address,
diff --git a/arch/arm64/lib/insn.c b/arch/arm64/lib/insn.c
index 8d38bf4bf203..71df4d72ac81 100644
--- a/arch/arm64/lib/insn.c
+++ b/arch/arm64/lib/insn.c
@@ -1021,38 +1021,6 @@ u32 aarch32_insn_mcr_extract_crm(u32 insn)
return insn & CRM_MASK;
}
-u32 aarch64_insn_gen_extr(enum aarch64_insn_variant variant,
- enum aarch64_insn_register Rm,
- enum aarch64_insn_register Rn,
- enum aarch64_insn_register Rd,
- u8 lsb)
-{
- u32 insn;
-
- insn = aarch64_insn_get_extr_value();
-
- switch (variant) {
- case AARCH64_INSN_VARIANT_32BIT:
- if (lsb > 31)
- return AARCH64_BREAK_FAULT;
- break;
- case AARCH64_INSN_VARIANT_64BIT:
- if (lsb > 63)
- return AARCH64_BREAK_FAULT;
- insn |= AARCH64_INSN_SF_BIT;
- insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_N, insn, 1);
- break;
- default:
- pr_err("%s: unknown variant encoding %d\n", __func__, variant);
- return AARCH64_BREAK_FAULT;
- }
-
- insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_S, insn, lsb);
- insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, Rd);
- insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, Rn);
- return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, Rm);
-}
-
static u32 __get_barrier_crm_val(enum aarch64_insn_mb_type type)
{
switch (type) {
--
2.43.0
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