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Message-Id: <20250922-ipcc-header-v1-1-f0b12715e118@oss.qualcomm.com>
Date: Mon, 22 Sep 2025 20:34:20 -0700
From: Jingyi Wang <jingyi.wang@....qualcomm.com>
To: Manivannan Sadhasivam <mani@...nel.org>,
Jassi Brar <jassisinghbrar@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, Jingyi Wang <jingyi.wang@....qualcomm.com>
Subject: [PATCH] dt-bindings: mailbox: qcom-ipcc: Add bindings for physical
client ids
Physical client IDs instead of virtual client IDs are used for qcom new
platforms in the Inter Process Communication Controller (IPCC) driver
as virtual physical mapping logic is removed in HW. Add the bindings.
Signed-off-by: Jingyi Wang <jingyi.wang@....qualcomm.com>
---
include/dt-bindings/mailbox/qcom-ipcc.h | 48 +++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/include/dt-bindings/mailbox/qcom-ipcc.h b/include/dt-bindings/mailbox/qcom-ipcc.h
index fd85a79381b3..dc07ca27db09 100644
--- a/include/dt-bindings/mailbox/qcom-ipcc.h
+++ b/include/dt-bindings/mailbox/qcom-ipcc.h
@@ -36,4 +36,52 @@
#define IPCC_CLIENT_GPDSP0 31
#define IPCC_CLIENT_GPDSP1 32
+/* Physical client IDs */
+#define IPCC_MPROC_AOP 0
+#define IPCC_MPROC_TZ 1
+#define IPCC_MPROC_MPSS 2
+#define IPCC_MPROC_LPASS 3
+#define IPCC_MPROC_SDC 4
+#define IPCC_MPROC_CDSP 5
+#define IPCC_MPROC_APSS 6
+#define IPCC_MPROC_SOCCP 13
+#define IPCC_MPROC_DCP 14
+#define IPCC_MPROC_SPSS 15
+#define IPCC_MPROC_TME 16
+
+#define IPCC_COMPUTE_L0_CDSP 2
+#define IPCC_COMPUTE_L0_APSS 3
+#define IPCC_COMPUTE_L0_GPU 4
+#define IPCC_COMPUTE_L0_CVP 8
+#define IPCC_COMPUTE_L0_CAM 9
+#define IPCC_COMPUTE_L0_CAM1 10
+#define IPCC_COMPUTE_L0_DCP 11
+#define IPCC_COMPUTE_L0_VPU 12
+#define IPCC_COMPUTE_L0_SOCCP 16
+
+#define IPCC_COMPUTE_L1_CDSP 2
+#define IPCC_COMPUTE_L1_APSS 3
+#define IPCC_COMPUTE_L1_GPU 4
+#define IPCC_COMPUTE_L1_CVP 8
+#define IPCC_COMPUTE_L1_CAM 9
+#define IPCC_COMPUTE_L1_CAM1 10
+#define IPCC_COMPUTE_L1_DCP 11
+#define IPCC_COMPUTE_L1_VPU 12
+#define IPCC_COMPUTE_L1_SOCCP 16
+
+#define IPCC_PERIPH_CDSP 2
+#define IPCC_PERIPH_APSS 3
+#define IPCC_PERIPH_PCIE0 4
+#define IPCC_PERIPH_PCIE1 5
+
+#define IPCC_FENCE_CDSP 2
+#define IPCC_FENCE_APSS 3
+#define IPCC_FENCE_GPU 4
+#define IPCC_FENCE_CVP 8
+#define IPCC_FENCE_CAM 8
+#define IPCC_FENCE_VPU 20
+#define IPCC_FENCE_SOCCP 24
+#define IPCC_FENCE_CAM1 10
+#define IPCC_FENCE_DCP 11
+
#endif
---
base-commit: ae2d20002576d2893ecaff25db3d7ef9190ac0b6
change-id: 20250922-ipcc-header-c17cb4eea4b2
Best regards,
--
Jingyi Wang <jingyi.wang@....qualcomm.com>
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