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Message-ID: <fee90caf-1646-4fdf-8835-20c28c0181c6@collabora.com>
Date: Wed, 24 Sep 2025 10:24:51 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Mikhail Kshevetskiy <mikhail.kshevetskiy@...sys.eu>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>, Felix Fietkau <nbd@....name>,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Cc: Andreas Gnau <andreas.gnau@...sys.eu>
Subject: Re: [PATCH 2/2] clk: en7523: Add reset-controller support for EN7523
SoC
Il 24/09/25 08:05, Mikhail Kshevetskiy ha scritto:
> Introduce reset API support to EN7523 clock driver. EN7523 uses the
> same reset logic as EN7581, so just reuse existing code. The patch
> renames:
> * en7581_rst_ofs to en75xx_rst_ofs,
> * en7581_reset_register() to en75xx_reset_register()
> because they are not en7581 specific.
>
> This patch also updates en7523 dtsi file to add required '#reset-cells'
> property to the System Control Unit node.
>
> Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@...sys.eu>
> ---
> arch/arm/boot/dts/airoha/en7523.dtsi | 1 +
Driver and devicetree changes have to be done in two different commits.
Please split.
> drivers/clk/clk-en7523.c | 72 ++++++++++++++++++++++++----
> 2 files changed, 64 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/boot/dts/airoha/en7523.dtsi b/arch/arm/boot/dts/airoha/en7523.dtsi
> index b523a868c4ad..7d60a4f2e650 100644
> --- a/arch/arm/boot/dts/airoha/en7523.dtsi
> +++ b/arch/arm/boot/dts/airoha/en7523.dtsi
> @@ -91,6 +91,7 @@ scu: system-controller@...20000 {
> reg = <0x1fa20000 0x400>,
> <0x1fb00000 0x1000>;
> #clock-cells = <1>;
> + #reset-cells = <1>;
> };
>
> gic: interrupt-controller@...0000 {
> diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c
> index 15bbdeb60b8e..f276937181b9 100644
> --- a/drivers/clk/clk-en7523.c
> +++ b/drivers/clk/clk-en7523.c
> @@ -9,6 +9,7 @@
> #include <linux/regmap.h>
> #include <linux/reset-controller.h>
> #include <dt-bindings/clock/en7523-clk.h>
> +#include <dt-bindings/reset/airoha,en7523-reset.h>
> #include <dt-bindings/reset/airoha,en7581-reset.h>
>
> #define RST_NR_PER_BANK 32
> @@ -294,11 +295,58 @@ static const struct en_clk_desc en7581_base_clks[] = {
> }
> };
>
> -static const u16 en7581_rst_ofs[] = {
> +static const u16 en75xx_rst_ofs[] = {
There's no need to rename this.
> REG_RST_CTRL2,
> REG_RST_CTRL1,
> };
>
> +static const u16 en7523_rst_map[] = {
> + /* RST_CTRL2 */
> + [EN7523_XPON_PHY_RST] = 0,
> + [EN7523_XSI_MAC_RST] = 7,
> + [EN7523_XSI_PHY_RST] = 8,
> + [EN7523_NPU_RST] = 9,
> + [EN7523_I2S_RST] = 10,
> + [EN7523_TRNG_RST] = 11,
> + [EN7523_TRNG_MSTART_RST] = 12,
> + [EN7523_DUAL_HSI0_RST] = 13,
> + [EN7523_DUAL_HSI1_RST] = 14,
> + [EN7523_HSI_RST] = 15,
> + [EN7523_DUAL_HSI0_MAC_RST] = 16,
> + [EN7523_DUAL_HSI1_MAC_RST] = 17,
> + [EN7523_HSI_MAC_RST] = 18,
> + [EN7523_WDMA_RST] = 19,
> + [EN7523_WOE0_RST] = 20,
> + [EN7523_WOE1_RST] = 21,
> + [EN7523_HSDMA_RST] = 22,
> + [EN7523_I2C2RBUS_RST] = 23,
> + [EN7523_TDMA_RST] = 24,
> + /* RST_CTRL1 */
> + [EN7523_PCM1_ZSI_ISI_RST] = RST_NR_PER_BANK + 0,
> + [EN7523_FE_PDMA_RST] = RST_NR_PER_BANK + 1,
> + [EN7523_FE_QDMA_RST] = RST_NR_PER_BANK + 2,
> + [EN7523_PCM_SPIWP_RST] = RST_NR_PER_BANK + 4,
> + [EN7523_CRYPTO_RST] = RST_NR_PER_BANK + 6,
> + [EN7523_TIMER_RST] = RST_NR_PER_BANK + 8,
> + [EN7523_PCM1_RST] = RST_NR_PER_BANK + 11,
> + [EN7523_UART_RST] = RST_NR_PER_BANK + 12,
> + [EN7523_GPIO_RST] = RST_NR_PER_BANK + 13,
> + [EN7523_GDMA_RST] = RST_NR_PER_BANK + 14,
> + [EN7523_I2C_MASTER_RST] = RST_NR_PER_BANK + 16,
> + [EN7523_PCM2_ZSI_ISI_RST] = RST_NR_PER_BANK + 17,
> + [EN7523_SFC_RST] = RST_NR_PER_BANK + 18,
> + [EN7523_UART2_RST] = RST_NR_PER_BANK + 19,
> + [EN7523_GDMP_RST] = RST_NR_PER_BANK + 20,
> + [EN7523_FE_RST] = RST_NR_PER_BANK + 21,
> + [EN7523_USB_HOST_P0_RST] = RST_NR_PER_BANK + 22,
> + [EN7523_GSW_RST] = RST_NR_PER_BANK + 23,
> + [EN7523_SFC2_PCM_RST] = RST_NR_PER_BANK + 25,
> + [EN7523_PCIE0_RST] = RST_NR_PER_BANK + 26,
> + [EN7523_PCIE1_RST] = RST_NR_PER_BANK + 27,
> + [EN7523_PCIE_HB_RST] = RST_NR_PER_BANK + 29,
> + [EN7523_XPON_MAC_RST] = RST_NR_PER_BANK + 31,
> +};
> +
> static const u16 en7581_rst_map[] = {
> /* RST_CTRL2 */
> [EN7581_XPON_PHY_RST] = 0,
> @@ -357,6 +405,9 @@ static const u16 en7581_rst_map[] = {
> [EN7581_XPON_MAC_RST] = RST_NR_PER_BANK + 31,
> };
>
> +static int en75xx_reset_register(struct device *dev, void __iomem *base,
> + const u16 *rst_map, int nr_resets);
> +
> static u32 en7523_get_base_rate(const struct en_clk_desc *desc, u32 val)
> {
> if (!desc->base_bits)
> @@ -552,7 +603,8 @@ static int en7523_clk_hw_init(struct platform_device *pdev,
>
> en7523_register_clocks(&pdev->dev, clk_data, base, np_base);
>
> - return 0;
> + return en75xx_reset_register(&pdev->dev, np_base, en7523_rst_map,
> + ARRAY_SIZE(en7523_rst_map));
> }
>
> static void en7581_register_clocks(struct device *dev, struct clk_hw_onecell_data *clk_data,
> @@ -646,13 +698,14 @@ static int en7523_reset_xlate(struct reset_controller_dev *rcdev,
> return rst_data->idx_map[reset_spec->args[0]];
> }
>
> -static const struct reset_control_ops en7581_reset_ops = {
> +static const struct reset_control_ops en75xx_reset_ops = {
Same, no need to rename.
> .assert = en7523_reset_assert,
> .deassert = en7523_reset_deassert,
> .status = en7523_reset_status,
> };
>
> -static int en7581_reset_register(struct device *dev, void __iomem *base)
> +static int en75xx_reset_register(struct device *dev, void __iomem *base,
> + const u16 *rst_map, int nr_resets)
And again. No need to rename.
Cheers,
Angelo
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