linux-kernel - Re: [PATCH] arm64: dts: qcom: lemans: add DT changes to enable MDSS1 and DPU

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Message-ID: <5nkxxydmtjt7hzp7v5ym4crx44d5o2v5jsq47bxehzzihyy2bs@owvruxcbde6a>
Date: Fri, 26 Sep 2025 00:45:17 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Mahadevan <mahadevan.p@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: lemans: add DT changes to enable MDSS1
 and DPU

On Thu, Sep 25, 2025 at 12:49:48PM +0200, Konrad Dybcio wrote:
> On 9/25/25 10:58 AM, Mahadevan wrote:
> > Add devicetree changes to enable second Mobile Display
> > Subsystem (MDSS1) and its Display Processing Unit(DPU) for
> > Qualcomm LEMANS platform.
> 
> No need to scream.. "lemans" or "LeMans"> 
> > Signed-off-by: Mahadevan <mahadevan.p@....qualcomm.com>
> 
> Please include your full name in git config
> 
> > ---
> >  arch/arm64/boot/dts/qcom/lemans.dtsi | 88 ++++++++++++++++++++++++++++++++++++
> >  1 file changed, 88 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
> > index 48f753002fc459a3e9fac0c0e98cbec6013fea0f..45c11c050d3f8853701fd20cf647aef5c6a9a8c9 100644
> > --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
> > @@ -6751,6 +6751,94 @@ compute-cb@3 {
> >  			};
> >  		};
> >  
> > +		mdss1: display-subsystem@...00000 {
> > +			compatible = "qcom,sa8775p-mdss";
> > +			reg = <0x0 0x22000000 0x0 0x1000>;
> > +			reg-names = "mdss";
> > +
> > +			/* same path used twice */
> 
> this comment is misleading
> 
> > +			interconnects = <&mmss_noc MASTER_MDP_CORE1_0 QCOM_ICC_TAG_ALWAYS
> > +					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> > +					<&mmss_noc MASTER_MDP_CORE1_1 QCOM_ICC_TAG_ALWAYS
> > +					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> > +					<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> > +					 &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
> > +			interconnect-names = "mdp0-mem",
> > +					     "mdp1-mem",
> > +					     "cpu-cfg";
> > +
> > +			resets = <&dispcc1 MDSS_DISP_CC_MDSS_CORE_BCR>;
> > +
> > +			power-domains = <&dispcc1 MDSS_DISP_CC_MDSS_CORE_GDSC>;
> > +
> > +			clocks = <&dispcc1 MDSS_DISP_CC_MDSS_AHB_CLK>,
> > +				 <&gcc GCC_DISP1_HF_AXI_CLK>,
> > +				 <&dispcc1 MDSS_DISP_CC_MDSS_MDP_CLK>;
> > +
> > +			interrupts = <GIC_SPI 865 IRQ_TYPE_LEVEL_HIGH>;
> > +			interrupt-controller;
> > +			#interrupt-cells = <1>;
> > +
> > +			iommus = <&apps_smmu 0x1800 0x402>;
> > +
> > +			#address-cells = <2>;
> > +			#size-cells = <2>;
> > +			ranges;
> > +
> > +			status = "disabled";
> > +
> > +			mdss1_mdp: display-controller@...01000 {
> > +				compatible = "qcom,sa8775p-dpu";
> 
> Adding nothing more but the DPU isn't very useful at all
> and doesn't really let you test the hardware (since you don't
> provide a sink)

Only with writeback.

-- 
With best wishes
Dmitry