| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <1d373c80-8589-424a-bd12-1a14784cca71@oss.qualcomm.com>
Date: Thu, 25 Sep 2025 12:05:03 +0530
From: Pankaj Patil <pankaj.patil@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Jyothi Kumar Seerapu <jyothi.seerapu@....qualcomm.com>,
Maulik Shah <maulik.shah@....qualcomm.com>,
Sibi Sankar <sibi.sankar@....qualcomm.com>,
Taniya Das <taniya.das@....qualcomm.com>,
Taniya Das <taniya.das@...lcomm.com>,
Kamal Wadhwa <kamal.wadhwa@....qualcomm.com>,
Prudhvi Yarlagadda <quic_pyarlaga@...cinc.com>,
Qiang Yu <qiang.yu@....qualcomm.com>,
Manaf Meethalavalappu Pallikunhi <manaf.pallikunhi@....qualcomm.com>,
Wesley Cheng <wesley.cheng@....qualcomm.com>
Subject: Re: [PATCH v2 00/24] arm64: dts: qcom: Introduce Glymur SoC dtsi and
Glymur CRD dts
On 9/25/2025 11:58 AM, Pankaj Patil wrote:
> Introduce dt-bindings and initial device tree support for Glymur,
> Qualcomm's next-generation compute SoC and it's associated
> Compute Reference Device (CRD) platform.
>
> https://www.qualcomm.com/products/mobile/snapdragon/laptops-and-tablets/snapdragon-x2-elite
> https://www.qualcomm.com/news/releases/2025/09/new-snapdragon-x2-elite-extreme-and-snapdragon-x2-elite-are-the-
>
> The base support enables booting to shell with rootfs on NVMe,
> demonstrating functionality for PCIe and NVMe subsystems.
> DCVS is also enabled, allowing dynamic frequency scaling for the CPUs.
> TSENS (Thermal Sensors) enabled for monitoring SoC temperature and
> thermal management. The platform is capable of booting kernel at EL2
> with kvm-unit tests performed on it for sanity.
>
> Features enabled in this patchset:
> 1. DCVS: CPU DCVS with scmi perf protocol
> 2. PCIe controller and PCIe PHY
> 3. NVMe storage support
> 4. Clocks and reset controllers - GCC, TCSRCC, DISPCC, RPMHCC
> 5. Interrupt controller
> 6. TLMM (Top-Level Mode Multiplexer)
> 7. QUP Block
> 8. Reserved memory regions
> 9. PMIC support with regulators
> 10. CPU Power Domains
> 11. TSENS (Thermal Sensors)
> 12. Remoteproc - SOCCP, ADSP and CDSP
> 13. RPMH Regulators
> 14. USB
>
> Dependencies:
>
> dt-bindings:
> 1. https://lore.kernel.org/all/20250918140249.2497794-1-pankaj.patil@oss.qualcomm.com/
> 2. https://lore.kernel.org/all/20250918141738.2524269-1-pankaj.patil@oss.qualcomm.com/
> 3. https://lore.kernel.org/all/20250919133439.965595-1-pankaj.patil@oss.qualcomm.com/
> 4. https://lore.kernel.org/all/20250919140952.1057737-1-pankaj.patil@oss.qualcomm.com/
> 5. https://lore.kernel.org/all/20250919141440.1068770-1-pankaj.patil@oss.qualcomm.com/
> 6. https://lore.kernel.org/all/20250919142325.1090059-1-pankaj.patil@oss.qualcomm.com/
> 7. https://lore.kernel.org/all/20250920113052.151370-1-pankaj.patil@oss.qualcomm.com/
> 8. https://lore.kernel.org/all/20250924-knp-pmic-binding-v1-1-b9cce48b8460@oss.qualcomm.com/
> 9. https://lore.kernel.org/linux-arm-msm/20250924183726.509202-1-sibi.sankar@oss.qualcomm.com/T/#m46501fe9edb880fc11f69442eaf4d2855f7e4608
> 10. https://lore.kernel.org/linux-arm-msm/20250925002034.856692-1-sibi.sankar@oss.qualcomm.com/
> 11. https://lore.kernel.org/linux-arm-msm/20250924144831.336367-1-sibi.sankar@oss.qualcomm.com/
>
> rpmh-regulators:
> 1. https://lore.kernel.org/all/20250918-glymur-rpmh-regulator-driver-v3-0-184c09678be3@oss.qualcomm.com/
>
> PMICs:
> 1. https://lore.kernel.org/linux-arm-msm/20250924-knp-dts-v1-0-3fdbc4b9e1b1@oss.qualcomm.com/ (Patch 8-11)
>
> PMIC-Glink:
> 1. https://lore.kernel.org/all/20250919175025.2988948-1-anjelique.melendez@oss.qualcomm.com/
> 2. https://lore.kernel.org/all/20250924232631.644234-1-anjelique.melendez@oss.qualcomm.com/
>
> spmi/pinctrl:
> 1. https://lore.kernel.org/all/20250920-glymur-spmi-v8-gpio-driver-v1-0-23df93b7818a@oss.qualcomm.com/
>
> PCI:
> 1. https://lore.kernel.org/all/20250903-glymur_pcie5-v4-0-c187c2d9d3bd@oss.qualcomm.com/
>
> Remoteproc:
> 1. https://lore.kernel.org/all/20250819165447.4149674-1-mukesh.ojha@oss.qualcomm.com/
> 2. https://lore.kernel.org/linux-arm-msm/20250924-knp-remoteproc-v1-0-611bf7be8329@oss.qualcomm.com/T/#t
> 3. https://lore.kernel.org/linux-arm-msm/20250924-knp-remoteproc-v1-0-611bf7be8329@oss.qualcomm.com/T/#t
>
> USB:
> 1. https://lore.kernel.org/all/20250925005228.4035927-1-wesley.cheng@oss.qualcomm.com/T/#mb7879fdba16496554a53c3726d90f94b6063dd09
>
> Linux-next based git tree containing all Glymur related patches is available at:
> https://git.codelinaro.org/clo/linux-kernel/kernel-qcom/-/tree/glymur?ref_type=heads
>
> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
> ---
> Changes in v2:
> - EDITME: describe what is new in this series revision.
> - EDITME: use bulletpoints and terse descriptions.
> - Link to v1: https://lore.kernel.org/r/20250925-v3_glymur_introduction-v1-0-5413a85117c6@oss.qualcomm.com
>
> ---
> Jyothi Kumar Seerapu (1):
> arm64: dts: qcom: glymur: Add QUPv3 configuration for serial engines
>
> Kamal Wadhwa (10):
> arm64: dts: qcom: glymur-crd: Add RPMH regulator rails
> arm64: dts: qcom: glymur: Add SPMI PMIC arbiter device
> arm64: dts: qcom: Add PMCX0102 pmic dtsi
> arm64: dts: qcom: Add SMB2370 pmic dtsi
> arm64: dts: qcom: Update pmh0104 dtsi for Glymur CRD
> arm64: dts: qcom: Update the pmh0110.dtsi for Glymur
> arm64: dts: qcom: glymur: Add PMICs dtsi for CRD
> arm64: boot: dts: glymur-crd: Add Volume down/up keys support
> arm64: dts: qcom: glymur-crd: Avoid RTC probe failure
> arm64: dts: qcom: glymur: Add PMIC glink node
>
> Manaf Meethalavalappu Pallikunhi (1):
> arm64: dts: qcom: glymur: Enable tsens and thermal zone nodes
>
> Maulik Shah (1):
> arm64: dts: qcom: glymur: Add cpu idle states
>
> Pankaj Patil (3):
> dt-bindings: arm: qcom: Document Glymur SoC and board
> arm64: defconfig: Enable Glymur configs for boot to shell
> arm64: dts: qcom: Introduce Glymur base dtsi and CRD dts
>
> Prudhvi Yarlagadda (1):
> arm64: dts: qcom: glymur: Add support for PCIe5
>
> Qiang Yu (1):
> arm64: dts: qcom: glymur-crd: Add power supply and sideband signal for pcie5
>
> Sibi Sankar (3):
> arm64: dts: qcom: glymur: Enable pdp0 mailbox
> arm64: dts: qcom: glymur: Enable ipcc and aoss nodes
> arm64: dts: qcom: glymur: Add remoteprocs
>
> Taniya Das (2):
> arm64: dts: qcom: glymur: Enable cpu dvfs for CPU scaling
> arm64: dts: qcom: glymur: Add display clock controller device
>
> Wesley Cheng (1):
> arm64: dts: qcom: glymur: Add USB support
>
> Documentation/devicetree/bindings/arm/qcom.yaml | 5 +
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/glymur-crd.dts | 795 +++
> arch/arm64/boot/dts/qcom/glymur-pmics.dtsi | 19 +
> arch/arm64/boot/dts/qcom/glymur.dtsi | 7445 +++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/pmcx0102.dtsi | 179 +
> arch/arm64/boot/dts/qcom/pmh0104.dtsi | 84 +
> arch/arm64/boot/dts/qcom/pmh0110.dtsi | 66 +-
> arch/arm64/boot/dts/qcom/smb2370.dtsi | 45 +
> arch/arm64/configs/defconfig | 6 +
> 10 files changed, 8644 insertions(+), 1 deletion(-)
> ---
> base-commit: fdcd2cfdf0db0a8b8299de79302465f790edea27
> change-id: 20250923-v3_glymur_introduction-e22ae3c868a2
>
> Best regards,
Please ignore this series, it was marked as v2 by mistake.
Thanks,
Pankaj
Powered by blists - more mailing lists