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Message-ID: <tsh4w4paux3g772ynjcbjx3ntz6ynqx2ucd273yz3ncscxihjk@dwwjbcqyheuo>
Date: Thu, 25 Sep 2025 11:15:42 +0300
From: Abel Vesa <abel.vesa@...aro.org>
To: Pankaj Patil <pankaj.patil@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Kamal Wadhwa <kamal.wadhwa@....qualcomm.com>
Subject: Re: [PATCH v2 15/24] arm64: dts: qcom: glymur: Add PMICs dtsi for CRD
On 25-09-25 11:58:21, Pankaj Patil wrote:
> From: Kamal Wadhwa <kamal.wadhwa@....qualcomm.com>
>
> Include all the PMICs present on the Glymur board into
> the glymur CRD DTS file.
>
> Signed-off-by: Kamal Wadhwa <kamal.wadhwa@....qualcomm.com>
> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/glymur-crd.dts | 1 +
> arch/arm64/boot/dts/qcom/glymur-pmics.dtsi | 19 +++++++++++++++++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> index e89b81dcb4f47b78307fa3ab6831657cf6491c89..97f6eedd7222368f5cbfdd02e9c4d87261d7f19a 100644
> --- a/arch/arm64/boot/dts/qcom/glymur-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> @@ -6,6 +6,7 @@
> /dts-v1/;
>
> #include "glymur.dtsi"
> +#include "glymur-pmics.dtsi"
> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>
> / {
> diff --git a/arch/arm64/boot/dts/qcom/glymur-pmics.dtsi b/arch/arm64/boot/dts/qcom/glymur-pmics.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..59dcfb67a203a7c576406037377fc9fbdce51a97
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/glymur-pmics.dtsi
> @@ -0,0 +1,19 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +#define PMH0110_F_E0 0x5
> +#define PMH0110_H_E0 0x7
> +#define PMH0104_I_E0 0x8
> +#define PMH0104_J_E0 0x9
These haven't been used anywhere.
Maybe you meant to define the ones suffixed with _SID, like so:
#define PMH0110_F_E0_SID 5
#define PMH0110_H_E0_SID 7
#define PMH0104_I_E0_SID 8
#define PMH0104_J_E0_SID 9
and without the '0x' as you will get a build warning about it.
> +
> +#define PMH0110_F_E1 0x5
> +#define PMH0104_L_E1 0xb
and here is an even bigger issue. If you define it with '0x' prefix, then you
get the warning, but if you drop the '0x' prefix it will fail to build.
I'm sorry to point this out, but this hasn't been properly tested.
Thanks for the patch though!
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