lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <325bcbb1f36ffa68c48423a623ca2815ad0ab3d3.camel@gmail.com>
Date: Tue, 30 Sep 2025 13:38:17 +0100
From: Nuno Sá <noname.nuno@...il.com>
To: Antoniu Miclaus <antoniu.miclaus@...log.com>, jic23@...nel.org, 
	robh@...nel.org, conor+dt@...nel.org, linux-iio@...r.kernel.org, 
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 6/6] iio: adc: ad4080: add support for AD4081

On Tue, 2025-09-30 at 10:32 +0000, Antoniu Miclaus wrote:
> Add support for AD4081 20-bit SAR ADC. The AD4081 has the same
> resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
> maximum (2 vs 7).
> 
> Changes:
> - Add AD4081_CHIP_ID definition (0x0051)
> - Create ad4081_channel with 20-bit resolution and 32-bit storage
> - Add ad4081_chip_info with lvds_cnv_clk_cnt_max = 2
> - Register AD4081 in device ID and OF match tables
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@...log.com>
> ---

Reviewed-by: Nuno Sá <nuno.sa@...log.com>

> no changes in v2.
>  drivers/iio/adc/ad4080.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
> index a68d7fa9f977..0dcbf175523c 100644
> --- a/drivers/iio/adc/ad4080.c
> +++ b/drivers/iio/adc/ad4080.c
> @@ -126,6 +126,7 @@
>  /* Miscellaneous Definitions */
>  #define
> AD4080_SPI_READ						BIT(7)
>  #define AD4080_CHIP_ID						0x0050
> +#define AD4081_CHIP_ID						0x0051
>  #define AD4084_CHIP_ID						0x0054
>  
>  #define AD4080_LVDS_CNV_CLK_CNT_MAX				7
> @@ -436,6 +437,8 @@ static struct iio_chan_spec_ext_info ad4080_ext_info[] = {
>  
>  static const struct iio_chan_spec ad4080_channel = AD4080_CHANNEL_DEFINE(20,
> 32);
>  
> +static const struct iio_chan_spec ad4081_channel = AD4080_CHANNEL_DEFINE(20,
> 32);
> +
>  static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16,
> 16);
>  
>  static const struct ad4080_chip_info ad4080_chip_info = {
> @@ -448,6 +451,16 @@ static const struct ad4080_chip_info ad4080_chip_info = {
>  	.lvds_cnv_clk_cnt_max = AD4080_LVDS_CNV_CLK_CNT_MAX,
>  };
>  
> +static const struct ad4080_chip_info ad4081_chip_info = {
> +	.name = "ad4081",
> +	.product_id = AD4081_CHIP_ID,
> +	.scale_table = ad4080_scale_table,
> +	.num_scales = ARRAY_SIZE(ad4080_scale_table),
> +	.num_channels = 1,
> +	.channels = &ad4081_channel,
> +	.lvds_cnv_clk_cnt_max = 2,
> +};
> +
>  static const struct ad4080_chip_info ad4084_chip_info = {
>  	.name = "ad4084",
>  	.product_id = AD4084_CHIP_ID,
> @@ -611,6 +624,7 @@ static int ad4080_probe(struct spi_device *spi)
>  
>  static const struct spi_device_id ad4080_id[] = {
>  	{ "ad4080", (kernel_ulong_t)&ad4080_chip_info },
> +	{ "ad4081", (kernel_ulong_t)&ad4081_chip_info },
>  	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
>  	{ }
>  };
> @@ -618,6 +632,7 @@ MODULE_DEVICE_TABLE(spi, ad4080_id);
>  
>  static const struct of_device_id ad4080_of_match[] = {
>  	{ .compatible = "adi,ad4080", &ad4080_chip_info },
> +	{ .compatible = "adi,ad4081", &ad4081_chip_info },
>  	{ .compatible = "adi,ad4084", &ad4084_chip_info },
>  	{ }
>  };

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ