linux-kernel - Re: [PATCH] clk: samsung: clk-pll: simplify samsung_pll_lock

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Message-ID: <CAPLW+4nqSntq=vEY4JL1=YZ+3Hb5EAeOB0aob+B6WGs97Zh3rw@mail.gmail.com>
Date: Fri, 3 Oct 2025 13:48:22 -0500
From: Sam Protsenko <semen.protsenko@...aro.org>
To: André Draszik <andre.draszik@...aro.org>
Cc: Krzysztof Kozlowski <krzk@...nel.org>, Sylwester Nawrocki <s.nawrocki@...sung.com>, 
	Chanwoo Choi <cw00.choi@...sung.com>, Alim Akhtar <alim.akhtar@...sung.com>, 
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Peter Griffin <peter.griffin@...aro.org>, Tudor Ambarus <tudor.ambarus@...aro.org>, 
	Will McVicker <willmcvicker@...gle.com>, kernel-team@...roid.com, 
	linux-samsung-soc@...r.kernel.org, linux-clk@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: samsung: clk-pll: simplify samsung_pll_lock_wait()

On Wed, Oct 1, 2025 at 10:13 AM André Draszik <andre.draszik@...aro.org> wrote:
>
> readl_relaxed_poll_timeout_atomic() has been updated in 2023 in
> commit 7349a69cf312 ("iopoll: Do not use timekeeping in
> read_poll_timeout_atomic()") to avoid usage of timekeeping APIs. It
> also never used udelay() when no delay was given.
>
> With the implementation avoiding timekeeping APIs, and with a caller
> not passing a delay, the timeout argument simply becomes a loop
> counter.
>
> Therefore the code here can be simplified to unconditionally use
> readl_relaxed_poll_timeout_atomic(). The difference being the last
> argument, the timeout (loop counter). Simply adjust it to pass the
> more generous counter in all cases.
>
> Signed-off-by: André Draszik <andre.draszik@...aro.org>
> ---

Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>

>  drivers/clk/samsung/clk-pll.c | 31 ++++++++++---------------------
>  1 file changed, 10 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
> index 7bea7be1d7e45c32f0b303ffa55ce9cde4a4f71d..a7e693f6983ec073bedd633ed8da7efafc1a20bb 100644
> --- a/drivers/clk/samsung/clk-pll.c
> +++ b/drivers/clk/samsung/clk-pll.c
> @@ -17,8 +17,7 @@
>  #include "clk.h"
>  #include "clk-pll.h"
>
> -#define PLL_TIMEOUT_US         20000U
> -#define PLL_TIMEOUT_LOOPS      1000000U
> +#define PLL_TIMEOUT_LOOPS      20000U
>
>  struct samsung_clk_pll {
>         struct clk_hw           hw;
> @@ -84,7 +83,7 @@ arch_initcall(samsung_pll_disable_early_timeout);
>  static int samsung_pll_lock_wait(struct samsung_clk_pll *pll,
>                                  unsigned int reg_mask)
>  {
> -       int i, ret;
> +       int ret;
>         u32 val;
>
>         /*
> @@ -93,25 +92,15 @@ static int samsung_pll_lock_wait(struct samsung_clk_pll *pll,
>          * initialized, another when the timekeeping is suspended. udelay() also
>          * cannot be used when the clocksource is not running on arm64, since
>          * the current timer is used as cycle counter. So a simple busy loop
> -        * is used here in that special cases. The limit of iterations has been
> -        * derived from experimental measurements of various PLLs on multiple
> -        * Exynos SoC variants. Single register read time was usually in range
> -        * 0.4...1.5 us, never less than 0.4 us.
> +        * is used here.
> +        * The limit of iterations has been derived from experimental
> +        * measurements of various PLLs on multiple Exynos SoC variants. Single
> +        * register read time was usually in range 0.4...1.5 us, never less than
> +        * 0.4 us.
>          */
> -       if (pll_early_timeout || timekeeping_suspended) {
> -               i = PLL_TIMEOUT_LOOPS;
> -               while (i-- > 0) {
> -                       if (readl_relaxed(pll->con_reg) & reg_mask)
> -                               return 0;
> -
> -                       cpu_relax();
> -               }
> -               ret = -ETIMEDOUT;
> -       } else {
> -               ret = readl_relaxed_poll_timeout_atomic(pll->con_reg, val,
> -                                       val & reg_mask, 0, PLL_TIMEOUT_US);
> -       }
> -
> +       ret = readl_relaxed_poll_timeout_atomic(pll->con_reg, val,
> +                                               val & reg_mask, 0,
> +                                               PLL_TIMEOUT_LOOPS);
>         if (ret < 0)
>                 pr_err("Could not lock PLL %s\n", clk_hw_get_name(&pll->hw));
>
>
> ---
> base-commit: 3b9b1f8df454caa453c7fb07689064edb2eda90a
> change-id: 20251001-samsung-clk-pll-simplification-3e02f8912122
>
> Best regards,
> --
> André Draszik <andre.draszik@...aro.org>
>
>