linux-kernel - Re: [PATCH v1 2/4] dt-bindings: usb: dwc3: Add Google SoC DWC3 USB

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Message-ID: <8ca61364-df47-41f2-b0d1-f2a8a74ec728@kernel.org>
Date: Tue, 7 Oct 2025 09:44:17 +0900
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Roy Luo <royluo@...gle.com>, Vinod Koul <vkoul@...nel.org>,
 Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
 Philipp Zabel <p.zabel@...gutronix.de>,
 Peter Griffin <peter.griffin@...aro.org>,
 André Draszik <andre.draszik@...aro.org>,
 Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: Joy Chakraborty <joychakr@...gle.com>, Naveen Kumar <mnkumar@...gle.com>,
 linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH v1 2/4] dt-bindings: usb: dwc3: Add Google SoC DWC3 USB

On 07/10/2025 08:21, Roy Luo wrote:
> Document the DWC3 USB bindings for Google Tensor SoCs.
> 
> Signed-off-by: Roy Luo <royluo@...gle.com>
> ---
>  .../bindings/usb/google,snps-dwc3.yaml        | 144 ++++++++++++++++++
>  1 file changed, 144 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/google,snps-dwc3.yaml
> 
> diff --git a/Documentation/devicetree/bindings/usb/google,snps-dwc3.yaml b/Documentation/devicetree/bindings/usb/google,snps-dwc3.yaml
> new file mode 100644
> index 000000000000..3e8bcc0c2cef
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/google,snps-dwc3.yaml
> @@ -0,0 +1,144 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright (c) 2025, Google LLC
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/google,snps-dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Google DWC3 USB SoC Controller
> +
> +maintainers:
> +  - Roy Luo <royluo@...gle.com>
> +
> +description:
> +  Describes the Google DWC3 USB block, based on Synopsys DWC3 IP.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - google,lga-dwc3
> +      - const: google,snps-dwc3


There is no such soc as snps, so you grossly misuse other company name
as name of SoC. Neither lga. Otherwise please point me to the top-level
bindings describing that SoC.

You need to better describe the hardware here - why this is something
completely different than GS which. Or switch to existing bindings and
existing drivers. Did you align this with Peter Griffin?


Best regards,
Krzysztof