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Message-ID: <CAM3sHeA2HUpcFJ7LOw1XfjJjLA+A5KsnqFoHe03bv1wHJ_zoMA@mail.gmail.com>
Date: Tue, 7 Oct 2025 11:32:51 +1030
From: Joel Stanley <jms@...storrent.com>
To: Drew Fustini <fustini@...nel.org>
Cc: Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Alexandre Ghiti <alex@...ti.fr>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Samuel Holland <samuel.holland@...ive.com>, Daniel Lezcano <daniel.lezcano@...aro.org>, 
	Thomas Gleixner <tglx@...utronix.de>, Anup Patel <anup@...infault.org>, Arnd Bergmann <arnd@...db.de>, 
	Joel Stanley <joel@....id.au>, Michael Neuling <mikey@...ling.org>, Nicholas Piggin <npiggin@...il.com>, 
	Michael Ellerman <mpe@...nel.org>, Andy Gross <agross@...nel.org>, 
	Anirudh Srinivasan <asrinivasan@...storrent.com>, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org, 
	Drew Fustini <dfustini@....tenstorrent.com>
Subject: Re: [PATCH v2 0/8] RISC-V: Add support for Tenstorrent Blackhole SoC

On Tue, 7 Oct 2025 at 07:51, Drew Fustini <fustini@...nel.org> wrote:
>
> Enable support for the Tenstorrent Blackhole SoC in the Blackhole P100
> and P150 PCIe cards [1]. The Blackhole SoC contains four RISC-V CPU
> tiles consisting of 4x SiFive X280 cores. Each tile is capable of
> running an instance of Linux.

Nice work Drew!

for the series:

Reviewed-by: Joel Stanley <joel@oss@...storrent.com>

Cheers,

Joel

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