linux-kernel - Re: [PATCH v2 3/4] dt-bindings: phy: google: Add Google Tensor G5 USB PHY

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Message-ID: <fa743412-d9f1-43fd-95e8-3b2a58cd6c25@kernel.org>
Date: Thu, 9 Oct 2025 08:58:24 +0900
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Roy Luo <royluo@...gle.com>, Vinod Koul <vkoul@...nel.org>,
 Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
 Philipp Zabel <p.zabel@...gutronix.de>,
 Peter Griffin <peter.griffin@...aro.org>,
 André Draszik <andre.draszik@...aro.org>,
 Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: Joy Chakraborty <joychakr@...gle.com>, Naveen Kumar <mnkumar@...gle.com>,
 Badhri Jagan Sridharan <badhri@...gle.com>, linux-phy@...ts.infradead.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-usb@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH v2 3/4] dt-bindings: phy: google: Add Google Tensor G5 USB
 PHY

On 08/10/2025 14:59, Roy Luo wrote:
> Document the device tree bindings for the USB PHY interfaces integrated
> with the DWC3 controller on Google Tensor SoCs, starting with G5
> generation.
> 
> Due to a complete architectural overhaul in the Google Tensor G5, the
> existing Samsung/Exynos USB PHY driver and binding for older generations
> of Google silicons such as gs101 are no longer compatible.
> 
> The USB PHY on Tensor G5 includes two integrated Synopsys PHY IPs: the
> eUSB 2.0 PHY IP and the USB 3.2/DisplayPort combo PHY IP. Currently only
> USB high-speed is described and supported.
> 
> Signed-off-by: Roy Luo <royluo@...gle.com>
> ---
>  .../bindings/phy/google,gs-usb-phy.yaml       | 96 +++++++++++++++++++
>  1 file changed, 96 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/google,gs-usb-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/google,gs-usb-phy.yaml b/Documentation/devicetree/bindings/phy/google,gs-usb-phy.yaml
> new file mode 100644
> index 000000000000..22961e2da6ef
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/google,gs-usb-phy.yaml
> @@ -0,0 +1,96 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2025, Google LLC
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/google,gs-usb-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Google Tensor Series (G5+) USB PHY
> +
> +maintainers:
> +  - Roy Luo <royluo@...gle.com>
> +
> +description: |
> +  Describes the USB PHY interfaces integrated with the DWC3 USB controller on
> +  Google Tensor SoCs, starting with the G5 generation.
> +  Two specific PHY IPs from Synopsys are integrated, including eUSB 2.0 PHY IP
> +  and USB 3.2/DisplayPort combo PHY IP.
> +  The first phandle argument within the PHY specifier is used to identify the
> +  desired PHY. The currently supported value is::

Currently supported as hardware will change? You describe here hardware
ONLY.

> +    0 - USB high-speed.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - google,gs5-usb-phy
> +
> +  reg:
> +    minItems: 3
> +    maxItems: 3
> +
> +  reg-names:
> +    items:
> +      - const: usb2_cfg_csr
> +      - const: dp_top_csr
> +      - const: usb_top_cfg_csr

Drop csr

> +
> +  "#phy-cells":
> +    const: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: usb2_phy_clk

Drop names, pointless for one entry.

> +
> +  resets:
> +    maxItems: 1
> +
> +  reset-names:
> +    items:
> +      - const: usb2_phy_reset

Drop names, pointless for one entry.

> +
> +  power-domains:
> +    maxItems: 1
> +
> +  orientation-switch:
> +    type: boolean
> +    description:
> +      Indicates the PHY as a handler of USB Type-C orientation changes
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - "#phy-cells"
> +  - clocks
> +  - clock-names
> +  - resets
> +  - reset-names
> +
> +unevaluatedProperties: false
> +


additionalProps instead. Read writing schema or example schema.


Best regards,
Krzysztof