linux-kernel - Re: [PATCH RESEND 2/2] i2c: tegra: Add Tegra256 support

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Message-ID: <20251008053530.27253-1-akhilrajeev@nvidia.com>
Date: Wed, 8 Oct 2025 11:05:30 +0530
From: Akhil R <akhilrajeev@...dia.com>
To: <jonathanh@...dia.com>
CC: <akhilrajeev@...dia.com>, <andi.shyti@...nel.org>, <conor+dt@...nel.org>,
	<devicetree@...r.kernel.org>, <digetx@...il.com>, <krzk+dt@...nel.org>,
	<ldewangan@...dia.com>, <linux-i2c@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
	<robh@...nel.org>, <thierry.reding@...il.com>, <treding@...dia.com>
Subject: Re: [PATCH RESEND 2/2] i2c: tegra: Add Tegra256 support

Hi Jon,

On Tue, 7 Oct 2025 15:50:56 +0100, Jon Hunter wrote:
> On 18/08/2025 05:33, Akhil R wrote:
>> Add compatible and the hardware struct for Tegra256. Tegra256 controllers
>> use a different parent clock. Hence the timing parameters are different
>> from the previous generations to meet the expected frequencies.
>>
>> Signed-off-by: Akhil R <akhilrajeev@...dia.com>
>> Acked-by: Thierry Reding <treding@...dia.com>
>>
>> ---
>>   drivers/i2c/busses/i2c-tegra.c | 26 ++++++++++++++++++++++++++
>>   1 file changed, 26 insertions(+)
>>
>> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
>> index 4eb31b913c1a..e533460bccc3 100644
>> --- a/drivers/i2c/busses/i2c-tegra.c
>> +++ b/drivers/i2c/busses/i2c-tegra.c
>> @@ -1649,7 +1649,33 @@ static const struct tegra_i2c_hw_feature tegra194_i2c_hw = {
>>        .has_interface_timing_reg = true,
>>   };
>>  
>> +static const struct tegra_i2c_hw_feature tegra256_i2c_hw = {
>> +     .has_continue_xfer_support = true,
>> +     .has_per_pkt_xfer_complete_irq = true,
>> +     .clk_divisor_hs_mode = 7,
>> +     .clk_divisor_std_mode = 0x7a,
>> +     .clk_divisor_fast_mode = 0x40,
>> +     .clk_divisor_fast_plus_mode = 0x19,
> 
> 
> Can you check this divisor value? I see we have been using a value of
> 0x14 for this which does not align with what we have here. Can you
> confirm if this should be 0x19 or 0x14?

If you happen to notice, we are using a different tlow, thigh and hold
time values as well internally. We are also using separate variables
(tlow, thigh) for fast and fastplus modes, whereas this driver currently
uses the same variable (and value) for both fast and fastplus mode. With
that limitation, these are the closest timing values we can use now to
get the required frequency.

I am preparing the patches for the above changes and to align with the
internally used values. But I would probably wait for Kartik's patches
to conclude before sending this out, so as to reduce any conflicts.

Regards,
Akhil