linux-kernel - Re: [PATCH v3] ASoC: wm8978: add missing BCLK divider setup

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Message-ID: <f15af8e0-3bf5-4dd5-85e6-07d00f8b020c@sirena.org.uk>
Date: Wed, 8 Oct 2025 15:20:42 +0100
From: Mark Brown <broonie@...nel.org>
To: Sune Brian <briansune@...il.com>
Cc: Charles Keepax <ckeepax@...nsource.cirrus.com>,
	Liam Girdwood <lgirdwood@...il.com>,
	Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>,
	linux-sound@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] ASoC: wm8978: add missing BCLK divider setup

On Wed, Oct 08, 2025 at 09:46:07PM +0800, Sune Brian wrote:
> Mark Brown <broonie@...nel.org> 於 2025年10月8日 週三 下午9:40寫道：

> > This is not OK, BCLK is 99 which is less than 100 so there are not
> > enough BCLK cycles to clock the samples.

> With all do respect.
> This is not how IIS, left/right-just works my friend.
> LRCLK and BCLK must follows.
> This is no pure sample rate concept.
> I hate to explain my self.
> If this patch is not good I just give up.

Many devices (including all the Wolfson ones of that era IIRC) will
happily just ignore extra cycles on BCLK, the issue here is handling of
a f_256fs which is a bit off what it should be for some reason.  You're
assuming that the device is clocked at an exact and suitable multiple of
the sample rate like it's supposed to be but in practice these devices
work well enough for the system's purposes when the clocking is merely
close, they tend not to be particularly fragile and users perhaps not so
deeply concerned with audio fidelity.  Note the warning the driver will
generate about considering using the PLL to fix up such misclocking.

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