linux-kernel - [PATCH v2 3/3] arm64: dts: socfpga: agilex5: Add SMMU nodes

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Message-Id: <efa78dc7e87af4524b7a6273daaff336b3e7b07c.1760331941.git.khairul.anuar.romli@altera.com>
Date: Mon, 13 Oct 2025 13:17:38 +0800
From: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
To: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>,
	Vinod Koul <vkoul@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	dmaengine@...r.kernel.org (open list:DMA GENERIC OFFLOAD ENGINE SUBSYSTEM),
	devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS),
	linux-kernel@...r.kernel.org (open list),
	Miquel Raynal <miquel.raynal@...tlin.com>,
	Richard Weinberger <richard@....at>,
	Vignesh Raghavendra <vigneshr@...com>,
	Niravkumar L Rabara <niravkumar.l.rabara@...el.com>,
	linux-mtd@...ts.infradead.org (open list:CADENCE NAND DRIVER),
	Dinh Nguyen <dinguyen@...nel.org>,
	Khairul Anuar Romli <khairul.anuar.romli@...era.com>,
	Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>
Subject: [PATCH v2 3/3] arm64: dts: socfpga: agilex5: Add SMMU nodes

Add SMMU nodes for Agilex5. This SMMU nodes is compatible with arm,smmu-v3.

Add IOMMU property to the supported nodes.
- nand-controller
- dma-controller 0 and dma-controller 1
- usb

Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>
Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 04e99cd7e74b..a22cf6a211e2 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -272,6 +272,7 @@ nand: nand-controller@...80000 {
 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clkmgr AGILEX5_NAND_NF_CLK>;
 			cdns,board-delay-ps = <4830>;
+			iommus = <&smmu 4>;
 			status = "disabled";
 		};
 
@@ -298,6 +299,7 @@ dmac0: dma-controller@...b0000 {
 			snps,block-size = <32767 32767 32767 32767>;
 			snps,priority = <0 1 2 3>;
 			snps,axi-max-burst-len = <8>;
+			iommus = <&smmu 8>;
 		};
 
 		dmac1: dma-controller@...c0000 {
@@ -315,6 +317,7 @@ dmac1: dma-controller@...c0000 {
 			snps,block-size = <32767 32767 32767 32767>;
 			snps,priority = <0 1 2 3>;
 			snps,axi-max-burst-len = <8>;
+			iommus = <&smmu 9>;
 		};
 
 		rst: rstmgr@...11000 {
@@ -323,6 +326,18 @@ rst: rstmgr@...11000 {
 			#reset-cells = <1>;
 		};
 
+		smmu: iommu@...00000 {
+			compatible = "arm,smmu-v3";
+			reg = <0x16000000 0x30000>;
+			interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "eventq", "gerror", "priq";
+			dma-coherent;
+			#iommu-cells = <1>;
+			status = "disabled";
+		};
+
 		spi0: spi@...a4000 {
 			compatible = "snps,dw-apb-ssi";
 			reg = <0x10da4000 0x1000>;
@@ -423,6 +438,7 @@ usb0: usb@...00000 {
 			phy-names = "usb2-phy";
 			resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>;
 			reset-names = "dwc2", "dwc2-ecc";
+			iommus = <&smmu 6>;
 			clocks = <&clkmgr AGILEX5_USB2OTG_HCLK>;
 			clock-names = "otg";
 			status = "disabled";
-- 
2.35.3