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Message-ID: <kxwavurs7ebp5f22gxutvw4thwm24twqpahszhyxsodsikunja@7hl3y65ppqmo>
Date: Tue, 14 Oct 2025 13:21:51 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: xiangxu.yin@....qualcomm.com
Cc: Rob Clark <robin.clark@....qualcomm.com>,
Dmitry Baryshkov <lumag@...nel.org>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Jessica Zhang <jessica.zhang@....qualcomm.com>,
Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, linux-arm-msm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
fange.zhang@....qualcomm.com, yongxing.mou@....qualcomm.com,
li.liu@....qualcomm.com
Subject: Re: [PATCH v2 3/3] arm64: dts: qcom: Enable DisplayPort on QCS615
Ride platform
On Tue, Oct 14, 2025 at 05:42:12PM +0800, Xiangxu Yin via B4 Relay wrote:
> From: Xiangxu Yin <xiangxu.yin@....qualcomm.com>
>
> Add DP connector node and configure MDSS DisplayPort controller for
> QCS615 Ride platform. Include lane mapping and PHY supply settings
> to support DP output.
>
> Signed-off-by: Xiangxu Yin <xiangxu.yin@....qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> index 9ac1dd3483b56f9d1652f8a38f62d759efa92b6a..0b8bcabdd90a0820b1f9c85e43b78e40eb8a9a38 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> @@ -39,6 +39,20 @@ xo_board_clk: xo-board-clk {
> };
> };
>
> + dp0-connector {
> + compatible = "dp-connector";
> + label = "DP0";
> + type = "mini";
> +
> + hpd-gpios = <&io_expander 8 GPIO_ACTIVE_HIGH>;
Not the gpio102/ 103 / 104? Interesting.
> +
> + port {
> + dp0_connector_in: endpoint {
> + remote-endpoint = <&mdss_dp0_out>;
> + };
> + };
> + };
> +
> dp-dsi0-connector {
> compatible = "dp-connector";
> label = "DSI0";
> @@ -423,6 +437,16 @@ &mdss {
> status = "okay";
> };
>
> +&mdss_dp0 {
> + status = "okay";
> +};
> +
> +&mdss_dp0_out {
> + data-lanes = <3 2 0 1>;
It's not a board peculiarity. All QCS615 / SM6150 devices are affected
by this twist. Please move this to the SoC DT file.
> + link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000>;
> + remote-endpoint = <&dp0_connector_in>;
> +};
> +
> &mdss_dsi0 {
> vdda-supply = <&vreg_l11a>;
> status = "okay";
> @@ -623,6 +647,13 @@ &usb_qmpphy {
> status = "okay";
> };
>
> +&usb_qmpphy_2 {
> + vdda-phy-supply = <&vreg_l5a>;
> + vdda-pll-supply = <&vreg_l12a>;
> +
> + status = "okay";
> +};
> +
> &usb_1 {
> status = "okay";
> };
>
> --
> 2.34.1
>
>
--
With best wishes
Dmitry
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