linux-kernel - Re: [PATCH 04/24] arm64: dts: qcom: glymur: Add QUPv3 configuration for serial engines

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Message-ID: <026dffcf-f674-4481-b86d-07c28933c97b@oss.qualcomm.com>
Date: Wed, 15 Oct 2025 16:23:58 +0530
From: Jyothi Kumar Seerapu <jyothi.seerapu@....qualcomm.com>
To: Abel Vesa <abel.vesa@...aro.org>,
        Pankaj Patil <pankaj.patil@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 04/24] arm64: dts: qcom: glymur: Add QUPv3 configuration
 for serial engines



On 10/11/2025 4:46 PM, Abel Vesa wrote:
> On 25-09-25 12:02:12, Pankaj Patil wrote:
>> From: Jyothi Kumar Seerapu <jyothi.seerapu@....qualcomm.com>
>>
>> Add device tree support for QUPv3 serial engine protocols on Glymur.
>> Glymur has 24 QUP serial engines across 3 QUP wrappers, each with
>> support of GPI DMA engines.
>>
>> Signed-off-by: Jyothi Kumar Seerapu <jyothi.seerapu@....qualcomm.com>
>> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
>> ---
>>   arch/arm64/boot/dts/qcom/glymur-crd.dts |   43 +
>>   arch/arm64/boot/dts/qcom/glymur.dtsi    | 3041 +++++++++++++++++++++++++++++--
>>   2 files changed, 2936 insertions(+), 148 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
>> index f1c5a0cb483670e9f8044e250950693b4a015479..8674465b22707207523caa8ad635d95a3396497a 100644
>> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> 
> [...]
> 
>> +			qup_i2c22_data_clk: qup-i2c22-data-clk-state {
>> +				sda_pins {
>> +					/* SDA */
>> +					pins = "gpio88";
>> +					function = "qup2_se6";
>> +					drive-strength = <2>;
>> +					bias-pull-up = <2200>;
>> +				};
>> +
>> +				scl-pins {
>> +					/* SCL */
>> +					pins = "gpio89";
>> +					function = "qup2_se6";
>> +					drive-strength = <2>;
>> +					bias-pull-up = <2200>;
>> +				};
>> +			};
> 
> Re-write all of these like the following:
> 
> qup_i2c22_data_clk: qup-i2c22-data-clk-state {
> 	/* SDA, SCL */
> 	pins = "gpio88", "gpio89";
> 	function = "qup2_se6";
> 	drive-strength = <2>;
> 	bias-pull-up = <2200>;
> };
> 
> Just like we did on X1E80100.

Sure, that makes sense, as the same properties apply to both the SCL and 
SDA pins.