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Message-ID: <aPEoqkdatl4G82co@shikoro>
Date: Thu, 16 Oct 2025 19:17:30 +0200
From: Wolfram Sang <wsa+renesas@...g-engineering.com>
To: "Herve Codina (Schneider Electric)" <herve.codina@...tlin.com>
Cc: Jonathan Cameron <jic23@...nel.org>,
	David Lechner <dlechner@...libre.com>,
	Nuno Sá <nuno.sa@...log.com>,
	Andy Shevchenko <andy@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Magnus Damm <magnus.damm@...il.com>,
	Liam Girdwood <lgirdwood@...il.com>,
	Mark Brown <broonie@...nel.org>, linux-iio@...r.kernel.org,
	linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Pascal Eberhard <pascal.eberhard@...com>,
	Miquel Raynal <miquel.raynal@...tlin.com>,
	Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH 1/4] dt-bindings: iio: adc: Add the Renesas RZ/N1 ADC


> +description:
> +  The Renesas RZ/N1 ADC controller available in the Renesas RZ/N1 SoCs family
> +  can use up to two internal ACD cores (ADC1 and ADC2) those internal cores are

ADC cores?

> +  handled through ADC controller virtual channels.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - renesas,r9a06g032-adc   # RZ/N1D
> +      - const: renesas,rzn1-adc

Do you know of other SoCs with this IP core? If it is only RZ/N for now,
we could go with const for N1D. All other N1 variants cannot run Linux
because of no SDRAM controller.


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