linux-kernel - Re: [PATCH v5 32/44] KVM: x86/pmu: Disable interception of select PMU MSRs for mediated vPMUs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <ea123839-80fd-4555-8da2-adbd060a2082@linux.intel.com>
Date: Thu, 16 Oct 2025 08:04:26 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Sandipan Das <sandidas@....com>, Marc Zyngier <maz@...nel.org>,
 Oliver Upton <oliver.upton@...ux.dev>, Tianrui Zhao
 <zhaotianrui@...ngson.cn>, Bibo Mao <maobibo@...ngson.cn>,
 Huacai Chen <chenhuacai@...nel.org>, Anup Patel <anup@...infault.org>,
 Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
 <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
 Xin Li <xin@...or.com>, "H. Peter Anvin" <hpa@...or.com>,
 Andy Lutomirski <luto@...nel.org>, Peter Zijlstra <peterz@...radead.org>,
 Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo <acme@...nel.org>,
 Namhyung Kim <namhyung@...nel.org>, Paolo Bonzini <pbonzini@...hat.com>,
 linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.linux.dev,
 kvm@...r.kernel.org, loongarch@...ts.linux.dev,
 kvm-riscv@...ts.infradead.org, linux-riscv@...ts.infradead.org,
 linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
 Kan Liang <kan.liang@...ux.intel.com>, Yongwei Ma <yongwei.ma@...el.com>,
 Mingwei Zhang <mizhang@...gle.com>,
 Xiong Zhang <xiong.y.zhang@...ux.intel.com>,
 Sandipan Das <sandipan.das@....com>
Subject: Re: [PATCH v5 32/44] KVM: x86/pmu: Disable interception of select PMU
 MSRs for mediated vPMUs

On 10/16/2025 2:48 AM, Sean Christopherson wrote:
> On Thu, Oct 09, 2025, Dapeng Mi wrote:
>> On 10/2/2025 2:14 AM, Sean Christopherson wrote:
>>> On Fri, Sep 26, 2025, Sandipan Das wrote:
>>>> On 8/7/2025 1:26 AM, Sean Christopherson wrote:
>>>>> +	return kvm_need_perf_global_ctrl_intercept(vcpu) ||
>>>>>  	       pmu->counter_bitmask[KVM_PMC_GP] != (BIT_ULL(kvm_host_pmu.bit_width_gp) - 1) ||
>>>>>  	       pmu->counter_bitmask[KVM_PMC_FIXED] != (BIT_ULL(kvm_host_pmu.bit_width_fixed) - 1);
>>>>>  }
>>>> There is a case for AMD processors where the global MSRs are absent in the guest
>>>> but the guest still uses the same number of counters as what is advertised by the
>>>> host capabilities. So RDPMC interception is not necessary for all cases where
>>>> global control is unavailable.o
>>> Hmm, I think Intel would be the same?  Ah, no, because the host will have fixed
>>> counters, but the guest will not.  However, that's not directly related to
>>> kvm_pmu_has_perf_global_ctrl(), so I think this would be correct?
>>>
>>> diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
>>> index 4414d070c4f9..4c5b2712ee4c 100644
>>> --- a/arch/x86/kvm/pmu.c
>>> +++ b/arch/x86/kvm/pmu.c
>>> @@ -744,16 +744,13 @@ int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *data)
>>>         return 0;
>>>  }
>>>  
>>> -bool kvm_need_perf_global_ctrl_intercept(struct kvm_vcpu *vcpu)
>>> +static bool kvm_need_pmc_intercept(struct kvm_vcpu *vcpu)
>> The function name kvm_need_pmc_intercept() seems a little bit misleading
>> and make users think this function is used to check if a certain PMC is
>> intercepted. Maybe we can rename the function to kvm_need_global_intercept().
> Yeah, I don't love kvm_need_pmc_intercept() either.  But kvm_need_global_intercept()
> feels too close to kvm_need_perf_global_ctrl_intercept().
>
> Maybe something like kvm_need_any_pmc_intercept()?

It sounds good to me. Thanks.