linux-kernel - Re: [PATCH v2] x86/mce: Add support for PHYSADDRV and PHYSADDRVALIDSUPPORTED bits

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Message-ID: <20251017143139.GA1131586@yaz-khff2.amd.com>
Date: Fri, 17 Oct 2025 10:31:39 -0400
From: Yazen Ghannam <yazen.ghannam@....com>
To: Avadhut Naik <avadhut.naik@....com>
Cc: x86@...nel.org, linux-edac@...r.kernel.org, bp@...en8.de,
	tony.luck@...el.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] x86/mce: Add support for PHYSADDRV and
 PHYSADDRVALIDSUPPORTED bits

On Wed, Oct 15, 2025 at 05:22:25PM +0000, Avadhut Naik wrote:
> Starting with Zen6, AMD's Scalable MCA systems will incorporate two new
> bits in MCA_STATUS and MCA_CONFIG MSRs. These bits will indicate if a
> valid System Physical Address (SPA) is present in MCA_ADDR.
> 
> PhysAddrValidSupported bit (MCA_CONFIG[11]) serves as the architectural
> indicator and states if PhysAddrV bit (MCA_STATUS[54]) is Reserved or
> if it indicates validity of SPA in MCA_ADDR.
> 
> PhysAddrV bit (MCA_STATUS[54]) advertises if MCA_ADDR contains valid
> SPA or if it is implementation specific.
> 
> Use and prefer MCA_STATUS[PhysAddrV] when checking for a usable address.
> 
> Signed-off-by: Avadhut Naik <avadhut.naik@....com>
> ---

Minor nit:
The $SUBJECT could be simpler, like "Use new physical address valid
bit". And leave the details and proper field names for the commit
message.

But in any case, looks good to me.

Reviewed-by: Yazen Ghannam <yazen.ghannam@....com>

Thanks,
Yazen