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Message-ID: <811c728c-e2c9-462d-9c7a-dd79a683e301@kernel.org>
Date: Sun, 19 Oct 2025 11:10:09 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Akhil P Oommen <akhilpo@....qualcomm.com>,
Rob Clark <robin.clark@....qualcomm.com>, Sean Paul <sean@...rly.run>,
Konrad Dybcio <konradybcio@...nel.org>, Dmitry Baryshkov <lumag@...nel.org>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Jessica Zhang <jessica.zhang@....qualcomm.com>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH 2/6] dt-bindings: display/msm: gpu: Document A612 GPU
On 17/10/2025 19:08, Akhil P Oommen wrote:
> A612 GPU has a new IP called RGMU (Reduced Graphics Management Unit)
> which replaces GMU. But it doesn't do clock or voltage scaling. So we
> need the gpu core clock in the GPU node along with the power domain to
> do clock and voltage scaling from the kernel. Update the bindings to
> describe this GPU.
>
> Signed-off-by: Akhil P Oommen <akhilpo@....qualcomm.com>
> ---
> .../devicetree/bindings/display/msm/gpu.yaml | 31 ++++++++++++++++++++--
> 1 file changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml
> index 3696b083e353031a496a1f299d8f373270ca562d..efc529e82bc198e7c3c89a5eecb6f929960a8de9 100644
> --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml
> @@ -45,11 +45,11 @@ properties:
> - const: amd,imageon
>
> clocks:
> - minItems: 2
> + minItems: 1
> maxItems: 7
>
> clock-names:
> - minItems: 2
> + minItems: 1
> maxItems: 7
>
> reg:
> @@ -388,6 +388,33 @@ allOf:
> required:
> - clocks
> - clock-names
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: qcom,adreno-612.0
> + then:
> + properties:
> + clocks:
> + minItems: 1
Drop, it's implied.
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: core
> + description: GPU Core clock
> +
Missing constraint for 'reg'.
> + reg-names:
> + minItems: 1
Drop. MMIO range is not flexible.
> + items:
> + - const: kgsl_3d0_reg_memory
> + - const: cx_dbgc
> +
Best regards,
Krzysztof
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