linux-kernel - Re: (subset) [PATCH v2 0/3] Add PCIe Gen2x1 controller support for RK3528

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Message-Id: <176085639822.11982.1205401883779675228.b4-ty@kernel.org>
Date: Sun, 19 Oct 2025 12:16:38 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Bjorn Helgaas <bhelgaas@...gle.com>, 
 Lorenzo Pieralisi <lpieralisi@...nel.org>, 
 Krzysztof Wilczyński <kwilczynski@...nel.org>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>, 
 Shawn Lin <shawn.lin@...k-chips.com>, Simon Xue <xxm@...k-chips.com>, 
 Yao Zi <ziyao@...root.org>
Cc: linux-pci@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org, 
 linux-kernel@...r.kernel.org, Jonas Karlman <jonas@...boo.se>, 
 Chukun Pan <amadeus@....edu.cn>
Subject: Re: (subset) [PATCH v2 0/3] Add PCIe Gen2x1 controller support for
 RK3528


On Thu, 18 Sep 2025 15:30:54 +0000, Yao Zi wrote:
> Rockchip RK3528 ships one PCIe Gen2x1 controller that operates in RC
> mode only. The SoC doesn't provide a separate MSI controller, thus the
> one integrated in designware PCIe IP must be used. This series documents
> the PCIe controller in dt-binding and describes it in the SoC devicetree.
> 
> Radxa E20C board is used for testing, whose LAN GbE port is provided
> through an RTL8111H chip connected to PCIe controller. Its devicetree
> is adjusted to enable the controller, and IPERF3 shows the interface
> runs at full-speed. A typical result looks like
> 
> [...]

Applied, thanks!

[1/3] dt-bindings: PCI: dwc: rockchip: Add RK3528 variant
      commit: dfbf19c47a01eda5df4d476d64a273e1188ea5a1

Best regards,
-- 
Manivannan Sadhasivam <mani@...nel.org>