linux-kernel - Re: (subset) [PATCH v2 0/3] Add PCIe Gen2x1 controller support for RK3528

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Message-ID: <176096606936.3742628.8434480469163363343.b4-ty@sntech.de>
Date: Mon, 20 Oct 2025 15:14:41 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof Wilczyński <kwilczynski@...nel.org>,
	Manivannan Sadhasivam <mani@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Shawn Lin <shawn.lin@...k-chips.com>,
	Simon Xue <xxm@...k-chips.com>,
	Yao Zi <ziyao@...root.org>
Cc: Heiko Stuebner <heiko@...ech.de>,
	linux-pci@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Jonas Karlman <jonas@...boo.se>,
	Chukun Pan <amadeus@....edu.cn>
Subject: Re: (subset) [PATCH v2 0/3] Add PCIe Gen2x1 controller support for RK3528


On Thu, 18 Sep 2025 15:30:54 +0000, Yao Zi wrote:
> Rockchip RK3528 ships one PCIe Gen2x1 controller that operates in RC
> mode only. The SoC doesn't provide a separate MSI controller, thus the
> one integrated in designware PCIe IP must be used. This series documents
> the PCIe controller in dt-binding and describes it in the SoC devicetree.
> 
> Radxa E20C board is used for testing, whose LAN GbE port is provided
> through an RTL8111H chip connected to PCIe controller. Its devicetree
> is adjusted to enable the controller, and IPERF3 shows the interface
> runs at full-speed. A typical result looks like
> 
> [...]

Applied, thanks!

[2/3] arm64: dts: rockchip: Add PCIe Gen2x1 controller for RK3528
      commit: 263fac6b09b42a1b077c21354370d38758237ab0
[3/3] arm64: dts: rockchip: Enable PCIe controller on Radxa E20C
      commit: 047bac0be317e68b89d0deed4f659f8e080df6e8

Best regards,
-- 
Heiko Stuebner <heiko@...ech.de>