linux-kernel - Re: [PATCH 4/4] arm64: dts: imx8mp-phyboard-pollux: add PEB-WLBT-05 expansion board

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Message-ID: <aPZX9fapKz7d6Ekl@lizhi-Precision-Tower-5810>
Date: Mon, 20 Oct 2025 11:40:37 -0400
From: Frank Li <Frank.li@....com>
To: Yannic Moog <y.moog@...tec.de>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>, upstream@...ts.phytec.de,
	devicetree@...r.kernel.org, imx@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4] arm64: dts: imx8mp-phyboard-pollux: add PEB-WLBT-05
 expansion board

On Mon, Oct 20, 2025 at 03:11:25PM +0200, Yannic Moog wrote:
> PEB-WLBT-05 is an expansion board that provides WIFI and Bluetooth
> functionality. It features the Ezurio Sterling LWB module [1].
> Add missing regulator to baseboard dts.
>
> [1] https://www.ezurio.com/wireless-modules/wifi-modules-bluetooth/sterling-lwb-24-ghz-wifi-4-bt-51-module
>
> Signed-off-by: Yannic Moog <y.moog@...tec.de>
> ---
>  arch/arm64/boot/dts/freescale/Makefile             |   3 +
>  .../imx8mp-phyboard-pollux-peb-wlbt-05.dtso        | 108 +++++++++++++++++++++
>  .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts   |   9 ++
>  3 files changed, 120 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index d77e6ab8e46fe71ae41087a3b65ca64cc50e2e76..606a25f3323dab51ddff7bab686e69a8d48610a3 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -237,12 +237,15 @@ imx8mp-phyboard-pollux-peb-av-10-ph128800t006-dtbs += imx8mp-phyboard-pollux-rdk
>  imx8mp-phyboard-pollux-ph128800t006-dtbs += imx8mp-phyboard-pollux-rdk.dtb \
>  	imx8mp-phyboard-pollux-ph128800t006.dtbo
>  imx8mp-phyboard-pollux-rdk-no-eth-dtbs += imx8mp-phyboard-pollux-rdk.dtb imx8mp-phycore-no-eth.dtbo
> +imx8mp-phyboard-pollux-wlbt-dtbs += imx8mp-phyboard-pollux-rdk.dtb \
> +	imx8mp-phyboard-pollux-peb-wlbt-05.dtbo
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-etml1010g3dra.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-peb-av-10.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-peb-av-10-etml1010g3dra.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-peb-av-10-ph128800t006.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-ph128800t006.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk-no-eth.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-wlbt.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-basic.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-hdmi.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revb-lt6.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-wlbt-05.dtso b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-wlbt-05.dtso
> new file mode 100644
> index 0000000000000000000000000000000000000000..0e98f4d942716e57f5bc1567924460b618eb0930
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-wlbt-05.dtso
> @@ -0,0 +1,108 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
> +/*
> + * Copyright (C) 2025 PHYTEC Messtechnik GmbH
> + */
> +
> +#include <dt-bindings/clock/imx8mp-clock.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include "imx8mp-pinfunc.h"
> +
> +/dts-v1/;
> +/plugin/;
> +
> +&{/} {
> +	wlbt_clock: clock-32768 {
> +		compatible = "fixed-clock";
> +		clock-accuracy = <20000>;
> +		clock-frequency = <32768>;
> +		clock-output-names = "WIFIBT_SLOW_CLK";
> +		#clock-cells = <0>;
> +	};
> +
> +	usdhc1_pwrseq: pwr-seq {
> +		compatible = "mmc-pwrseq-simple";
> +		post-power-on-delay-ms = <250>;
> +		reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
> +	};
> +};
> +
> +&iomuxc {
> +	pinctrl_uart3: uart3grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SD1_RESET_B__UART3_DCE_RTS	0x140	/* RTS */
> +			MX8MP_IOMUXC_SD1_STROBE__UART3_DCE_CTS	0x140	/* CTS */
> +			MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX	0x140	/* RX */
> +			MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX	0x140	/* TX */
> +		>;
> +	};
> +
> +	pinctrl_bluetooth: bluetoothgrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06	0x106	/* BT_DEV_WAKE_EXP */
> +			MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07	0x106	/* BT_REG_ON_EXP */
> +			MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09	0x106	/* BT_HOST_WAKE_EXP */
> +		>;
> +	};
> +
> +	pinctrl_usdhc1: usdhc1grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x190	/* SDIO_CLK */
> +			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d0	/* SDIO_CMD */
> +			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d0	/* SDIO_D0 */
> +			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d0	/* SDIO_D1 */
> +			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d0	/* SDIO_D2 */
> +			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d0	/* SDIO_D3 */
> +		>;
> +	};
> +
> +	pinctrl_wifi: wifigrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05	0x106	/* WL_REG_ON_EXP */
> +		>;
> +	};
> +};
> +
> +&uart3 {
> +	assigned-clocks = <&clk IMX8MP_CLK_UART3>;
> +	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
> +	pinctrl-0 = <&pinctrl_uart3>;
> +	pinctrl-names = "default";
> +	uart-has-rtscts;
> +	status = "okay";
> +
> +	bluetooth {
> +		compatible = "brcm,bcm43438-bt";
> +		pinctrl-0 = <&pinctrl_bluetooth>;
> +		pinctrl-names = "default";
> +		clock-names = "lpo";
> +		clocks = <&wlbt_clock>;
> +		device-wakeup-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
> +		host-wakeup-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
> +		max-speed = <3000000>;
> +		shutdown-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
> +		vbat-supply = <&reg_vcc_3v3_sw>;
> +		vddio-supply = <&reg_vcc_1v8_exp_con>;
> +	};
> +};
> +
> +&usdhc1 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	pinctrl-0 = <&pinctrl_usdhc1>;
> +	pinctrl-names = "default";
> +	bus-width = <4>;
> +	max-frequency = <50000000>;
> +	mmc-pwrseq = <&usdhc1_pwrseq>;
> +	non-removable;
> +	vmmc-supply = <&reg_vcc_3v3_sw>;
> +	status = "okay";
> +
> +	wifi@1 {
> +		compatible = "brcm,bcm4329-fmac";
> +		reg = <1>;
> +		pinctrl-0 = <&pinctrl_wifi>;
> +		pinctrl-names = "default";
> +		reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
> +	};
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
> index 7d34b820e3213a3832c5be47444d4e9c636a6202..9e25ce1d466b1174c60d2bb350339ca5d68cc025 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
> @@ -119,6 +119,15 @@ reg_vcc_3v3_sw: regulator-vcc-3v3-sw {
>  		regulator-max-microvolt = <3300000>;
>  	};
>
> +	reg_vcc_1v8_exp_con: regulator-vcc-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-always-on;
> +		regulator-boot-on;

regulator-always-on and regulator-boot-on is not neccesary.

Frank
> +		regulator-max-microvolt = <1800000>;
> +		regulator-min-microvolt = <1800000>;
> +		regulator-name = "VCC_1V8_EXP_CON";
> +	};
> +
>  	thermal-zones {
>  		soc-thermal {
>  			trips {
>
> --
> 2.51.0
>