linux-kernel - [PATCH 4/4] riscv: sophgo: dts: enable PCIe for SG2042_EVB

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Message-Id: <50a753f9b8cbd5a90b5b2df737f87fc77a9b33a7.1760929111.git.unicorn_wang@outlook.com>
Date: Mon, 20 Oct 2025 11:40:09 +0800
From: Chen Wang <unicornxw@...il.com>
To: u.kleine-koenig@...libre.com,
	aou@...s.berkeley.edu,
	alex@...ti.fr,
	unicorn_wang@...look.com,
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	devicetree@...r.kernel.org,
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	linux-riscv@...ts.infradead.org,
	sophgo@...ts.linux.dev,
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Subject: [PATCH 4/4] riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0

From: Chen Wang <unicorn_wang@...look.com>

Enable PCIe controllers for Sophgo SG2042_EVB_V2.0 board,
which uses SG2042 SoC.

Signed-off-by: Han Gao <rabenda.cn@...il.com>
Signed-off-by: Chen Wang <unicorn_wang@...look.com>
---
 arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
index 46980e41b886..0cd0dc0f537c 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
+++ b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts
@@ -152,6 +152,18 @@ phy0: phy@0 {
 	};
 };
 
+&pcie_rc0 {
+	status = "okay";
+};
+
+&pcie_rc1 {
+	status = "okay";
+};
+
+&pcie_rc2 {
+	status = "okay";
+};
+
 &pinctrl {
 	emmc_cfg: sdhci-emmc-cfg {
 		sdhci-emmc-wp-pins {
-- 
2.34.1