linux-kernel - Re: [PATCH v2 1/5] dt-bindings: pinctrl: document pic64gx "gpio2" pinmux

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Message-ID: <176099405922.1818847.11880394494608466257.robh@kernel.org>
Date: Mon, 20 Oct 2025 16:01:00 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: devicetree@...r.kernel.org, Valentina.FernandezAlanis@...rochip.com,
	Conor Dooley <conor.dooley@...rochip.com>,
	linux-gpio@...r.kernel.org, linus.walleij@...aro.org,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/5] dt-bindings: pinctrl: document pic64gx "gpio2"
 pinmux


On Tue, 14 Oct 2025 15:35:34 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> The pic64gx has a second pinmux "downstream" of the iomux0 pinmux. The
> documentation for the SoC provides no name for this device, but it is
> used to swap pins between either GPIO controller #2 or select other
> functions, hence the "gpio2" name. Currently there is no documentation
> about what each bit actually does that is publicly available, nor (I
> believe) what pins are affected. That info is as follows:
> 
> pin     role (1/0)
> ---     ----------
> E14	MAC_0_MDC/GPIO_2_0
> E15	MAC_0_MDIO/GPIO_2_1
> F16	MAC_1_MDC/GPIO_2_2
> F17	MAC_1_MDIO/GPIO_2_3
> D19	SPI_0_CLK/GPIO_2_4
> B18	SPI_0_SS0/GPIO_2_5
> B10	CAN_0_RXBUS/GPIO_2_6
> C14	PCIE_PERST_2#/GPIO_2_7
> E18	PCIE_WAKE#/GPIO_2_8
> D18	PCIE_PERST_1#/GPIO_2_9
> E19	SPI_0_DO/GPIO_2_10
> C7	SPI_0_DI/GPIO_2_11
> D6	QSPI_SS0/GPIO_2_12
> D7	QSPI_CLK (B)/GPIO_2_13
> C9	QSPI_DATA0/GPIO_2_14
> C10	QSPI_DATA1/GPIO_2_15
> A5	QSPI_DATA2/GPIO_2_16
> A6	QSPI_DATA3/GPIO_2_17
> D8	MMUART_3_RXD/GPIO_2_18
> D9	MMUART_3_TXD/GPIO_2_19
> B8	MMUART_4_RXD/GPIO_2_20
> A8	MMUART_4_TXD/GPIO_2_21
> C12	CAN_1_TXBUS/GPIO_2_22
> B12	CAN_1_RXBUS/GPIO_2_23
> A11	CAN_0_TX_EBL_N/GPIO_2_24
> A10	CAN_1_TX_EBL_N/GPIO_2_25
> D11	MMUART_2_RXD/GPIO_2_26
> C11	MMUART_2_TXD/GPIO_2_27
> B9	CAN_0_TXBUS/GPIO_2_28
> 
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
>  .../microchip,pic64gx-pinctrl-gpio2.yaml      | 73 +++++++++++++++++++
>  1 file changed, 73 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic64gx-pinctrl-gpio2.yaml
> 

Reviewed-by: Rob Herring (Arm) <robh@...nel.org>