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Message-ID: <87y0p3tiz9.fsf@bootlin.com>
Date: Wed, 22 Oct 2025 10:54:02 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Richard Genoud <richard.genoud@...tlin.com>
Cc: Richard Weinberger <richard@....at>, Vignesh Raghavendra
<vigneshr@...com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai
<wens@...e.org>, Jernej Skrabec <jernej.skrabec@...il.com>, Samuel
Holland <samuel@...lland.org>, Uwe Kleine-König
<u.kleine-koenig@...libre.com>, Wentao Liang <vulab@...as.ac.cn>, Johan
Hovold <johan@...nel.org>, Maxime Ripard <mripard@...nel.org>, Thomas
Petazzoni <thomas.petazzoni@...tlin.com>, linux-mtd@...ts.infradead.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 04/15] mtd: rawnand: sunxi: introduce reg_user_data
in sunxi_nfc_caps
Hi Richard,
On 20/10/2025 at 12:13:00 +02, Richard Genoud <richard.genoud@...tlin.com> wrote:
> The H6/H616 USER_DATA register is not at the same offset as the
> A10/A23 one, so move its offset into sunxi_nfc_caps
>
> No functional change.
>
> Signed-off-by: Richard Genoud <richard.genoud@...tlin.com>
> ---
> drivers/mtd/nand/raw/sunxi_nand.c | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
> index 0285e4d0ca7f..8f5d8df19e33 100644
> --- a/drivers/mtd/nand/raw/sunxi_nand.c
> +++ b/drivers/mtd/nand/raw/sunxi_nand.c
> @@ -48,7 +48,8 @@
> #define NFC_REG_DEBUG 0x003C
> #define NFC_REG_A10_ECC_ERR_CNT 0x0040
> #define NFC_REG_ECC_ERR_CNT(nfc, x) ((nfc->caps->reg_ecc_err_cnt + (x)) & ~0x3)
> -#define NFC_REG_USER_DATA(x) (0x0050 + ((x) * 4))
> +#define NFC_REG_A10_USER_DATA 0x0050
> +#define NFC_REG_USER_DATA(nfc, x) (nfc->caps->reg_user_data + ((x) * 4))
> #define NFC_REG_SPARE_AREA 0x00A0
> #define NFC_REG_PAT_ID 0x00A4
> #define NFC_REG_MDMA_ADDR 0x00C0
> @@ -214,6 +215,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
> * through MBUS on A23/A33 needs extra configuration.
> * @reg_io_data: I/O data register
> * @reg_ecc_err_cnt: ECC error counter register
> + * @reg_user_data: User data register
> * @dma_maxburst: DMA maxburst
> * @ecc_strengths: Available ECC strengths array
> * @nstrengths: Size of @ecc_strengths
> @@ -222,6 +224,7 @@ struct sunxi_nfc_caps {
> bool has_mdma;
> unsigned int reg_io_data;
> unsigned int reg_ecc_err_cnt;
> + unsigned int reg_user_data;
> unsigned int dma_maxburst;
> const u8 *ecc_strengths;
> unsigned int nstrengths;
> @@ -723,8 +726,8 @@ static void sunxi_nfc_hw_ecc_get_prot_oob_bytes(struct nand_chip *nand, u8 *oob,
> {
> struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
>
> - sunxi_nfc_user_data_to_buf(readl(nfc->regs + NFC_REG_USER_DATA(step)),
> - oob);
> + sunxi_nfc_user_data_to_buf(readl(nfc->regs +
> + NFC_REG_USER_DATA(nfc, step)),
> oob);
Minor nit, column limit is 100 now, so typically for this kind of
situation everything would fit on a single line.
Don't respin just for that if there is nothing else later, but if a v4
is needed you can change it.
Looks neat otherwise so far.
Thanks,
Miquèl
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