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Message-Id: <20251023-mt8196-ufs-v3-18-0f04b4a795ff@collabora.com>
Date: Thu, 23 Oct 2025 21:49:36 +0200
From: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
To: Alim Akhtar <alim.akhtar@...sung.com>,
Avri Altman <avri.altman@....com>, Bart Van Assche <bvanassche@....org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Peter Wang <peter.wang@...iatek.com>, Stanley Jhu <chu.stanley@...il.com>,
"James E.J. Bottomley" <James.Bottomley@...senPartnership.com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
Philipp Zabel <p.zabel@...gutronix.de>, Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
Cc: Louis-Alexis Eyraud <louisalexis.eyraud@...labora.com>,
kernel@...labora.com, linux-scsi@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
linux-phy@...ts.infradead.org,
Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Subject: [PATCH v3 18/24] scsi: ufs: mediatek: Rework
ufs_mtk_wait_idle_state
While ufs_mtk_wait_idle state has some code smells for me (the
VS_HCE_BASE early exit seems racey at best), it can still benefit from
some general cleanup to make the code flow less convoluted.
Use the iopoll helpers, for one, and specifically the one that sleeps
and does not busy delay, as it's being done for up to 5ms.
The register read is split out to a helper function that branches
between new and old style flow.
Every called uses the same 5ms timeout value, so there is no point in
making this a parameter. Just assume a 5ms timeout in the function.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
---
drivers/ufs/host/ufs-mediatek.c | 71 +++++++++++++++++------------------------
1 file changed, 30 insertions(+), 41 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 0c5bc6f19e83..a2e5c2cdafe1 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -10,6 +10,7 @@
#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
+#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -378,51 +379,39 @@ static void ufs_mtk_dbg_sel(struct ufs_hba *hba)
}
}
-static int ufs_mtk_wait_idle_state(struct ufs_hba *hba,
- unsigned long retry_ms)
+static u32 ufs_mtk_read_state(struct ufs_hba *hba, bool old_style)
{
- u64 timeout, time_checked;
- u32 val, sm;
- bool wait_idle;
- struct ufs_mtk_host *host = ufshcd_get_variant(hba);
-
- /* cannot use plain ktime_get() in suspend */
- timeout = ktime_get_mono_fast_ns() + retry_ms * 1000000UL;
-
- /* wait a specific time after check base */
- udelay(10);
- wait_idle = false;
+ u32 val;
- do {
- time_checked = ktime_get_mono_fast_ns();
- if (host->legacy_ip_ver || host->ip_ver < IP_VER_MT6899) {
- ufs_mtk_dbg_sel(hba);
- val = ufshcd_readl(hba, REG_UFS_PROBE);
- } else {
- val = ufshcd_readl(hba, REG_UFS_UFS_MMIO_OTSD_CTRL);
- val = val >> 16;
- }
+ if (old_style) {
+ ufs_mtk_dbg_sel(hba);
+ val = ufshcd_readl(hba, REG_UFS_PROBE);
+ } else {
+ val = ufshcd_readl(hba, REG_UFS_UFS_MMIO_OTSD_CTRL) >> 16;
+ }
- sm = val & 0x1f;
+ return FIELD_GET(0x1f, val);
+}
- /*
- * if state is in H8 enter and H8 enter confirm
- * wait until return to idle state.
- */
- if ((sm >= VS_HIB_ENTER) && (sm <= VS_HIB_EXIT)) {
- wait_idle = true;
- udelay(50);
- continue;
- } else if (!wait_idle)
- break;
+static int ufs_mtk_wait_idle_state(struct ufs_hba *hba)
+{
+ struct ufs_mtk_host *host = ufshcd_get_variant(hba);
+ bool old_style = (host->legacy_ip_ver || host->ip_ver < IP_VER_MT6899);
+ u32 val;
+ int ret;
- if (wait_idle && (sm == VS_HCE_BASE))
- break;
- } while (time_checked < timeout);
+ /* If the device is already in the base state after 10us, don't wait. */
+ udelay(10);
+ if (ufs_mtk_read_state(hba, old_style) == VS_HCE_BASE)
+ return 0;
- if (wait_idle && sm != VS_HCE_BASE) {
- dev_info(hba->dev, "wait idle tmo: 0x%x\n", val);
- return -ETIMEDOUT;
+ /* Poll to wait for idle */
+ ret = read_poll_timeout(ufs_mtk_read_state, val,
+ (val < VS_HIB_ENTER || val > VS_HIB_EXIT), 50,
+ 5 * USEC_PER_MSEC, false, hba, old_style);
+ if (ret) {
+ dev_err(hba->dev, "Timed out waiting for idle state, val = 0x%x\n", val);
+ return ret;
}
return 0;
@@ -1376,7 +1365,7 @@ static int ufs_mtk_auto_hibern8_disable(struct ufs_hba *hba)
ufshcd_writel(hba, 0, REG_AUTO_HIBERNATE_IDLE_TIMER);
/* wait host return to idle state when auto-hibern8 off */
- ret = ufs_mtk_wait_idle_state(hba, 5);
+ ret = ufs_mtk_wait_idle_state(hba);
if (ret)
goto out;
@@ -1580,7 +1569,7 @@ static int ufs_mtk_link_set_hpm(struct ufs_hba *hba)
return err;
/* Check link state to make sure exit h8 success */
- err = ufs_mtk_wait_idle_state(hba, 5);
+ err = ufs_mtk_wait_idle_state(hba);
if (err) {
dev_err(hba->dev, "Failed to wait for idle: %pe\n", ERR_PTR(err));
return err;
--
2.51.1.dirty
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