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Message-ID: <66066ad6-0501-4f56-833b-16f63d06c9dc@collabora.com>
Date: Fri, 24 Oct 2025 11:00:07 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>,
Alim Akhtar <alim.akhtar@...sung.com>, Avri Altman <avri.altman@....com>,
Bart Van Assche <bvanassche@....org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Peter Wang <peter.wang@...iatek.com>, Stanley Jhu <chu.stanley@...il.com>,
"James E.J. Bottomley" <James.Bottomley@...senPartnership.com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
Philipp Zabel <p.zabel@...gutronix.de>, Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
Cc: Louis-Alexis Eyraud <louisalexis.eyraud@...labora.com>,
kernel@...labora.com, linux-scsi@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
linux-phy@...ts.infradead.org
Subject: Re: [PATCH v3 00/24] MediaTek UFS Cleanup and MT8196 Enablement
Il 23/10/25 21:49, Nicolas Frattaroli ha scritto:
> In this series, the existing MediaTek UFS binding is expanded and
> completed to correctly describe not just the existing compatibles, but
> also to introduce a new compatible in the from of the MT8196 SoC.
>
> The resets, which until now were completely absent from both the UFS
> host controller binding and the UFS PHY binding, are introduced to both.
> This also means the driver's undocumented and, in mainline, unused reset
> logic is reworked. In particular, the PHY reset is no longer a reset of
> the host controller node, but of the PHY node.
>
> This means the host controller can reset the PHY through the common PHY
> framework.
>
> The resets remain optional.
>
> Additionally, a massive number of driver cleanups are introduced. These
> were prompted by me inspecting the driver more closely as I was
> adjusting it to correspond to the binding.
>
> The driver still implements vendor properties that are undocumented in
> the binding. I did not touch most of those, as I neither want to
> convince the bindings maintainers that they are needed without knowing
> precisely what they're for, nor do I want to argue with the driver
> authors when removing them.
>
> Due to the "Marie Kondo with a chainsaw" nature of the driver cleanup
> patches, I humbly request that reviewers do not comment on displeasing
> code they see in the context portion of a patch before they've read the
> whole patch series, as that displeasing code may in fact be reworked in
> a subsequent patch of this series. Please keep comments focused on the
> changed lines of the diff; I know there's more that can be done, but it
> doesn't necessarily need to be part of this series.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
On all of the new commits that don't have the tag:
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Thanks for finally doing a partial refactor of this driver - this finally brings
it to entirely different quality standards.
For all that you've done, MT8196 enablement is "just a plus". The very important
and fun part here is the whole refactoring.
Well done!
Cheers,
Angelo
> ---
> Changes in v3:
> - Split mediatek,ufs bindings change into two patches, one for
> completing the existing binding, one for the MT8196
> - Add over a dozen driver cleanup patches
> - Add explicit support for the MT8196 compatible to the driver
> - Note: next-20251023, on which I based this, currently has a broken
> build due to an unrelated OPP core change that was merged with no
> build testing. I can't use next-20251022 either, as that lacks the
> recent mediatek UFS changes. It is what it is.
> - Link to v2: https://lore.kernel.org/r/20251016-mt8196-ufs-v2-0-c373834c4e7a@collabora.com
>
> Changes in v2:
> - Reorder define in mtk_sip_svc.h
> - Use bulk reset APIs in UFS host driver
> - Link to v1: https://lore.kernel.org/r/20251014-mt8196-ufs-v1-0-195dceb83bc8@collabora.com
>
> ---
> Nicolas Frattaroli (24):
> dt-bindings: phy: Add mediatek,mt8196-ufsphy variant
> dt-bindings: ufs: mediatek,ufs: Complete the binding
> dt-bindings: ufs: mediatek,ufs: Add mt8196 variant
> scsi: ufs: mediatek: Move MTK_SIP_UFS_CONTROL to mtk_sip_svc.h
> phy: mediatek: ufs: Add support for resets
> scsi: ufs: mediatek: Rework resets
> scsi: ufs: mediatek: Rework 0.9V regulator
> scsi: ufs: mediatek: Rework init function
> scsi: ufs: mediatek: Rework the crypt-boost stuff
> scsi: ufs: mediatek: Rework probe function
> scsi: ufs: mediatek: Remove vendor kernel quirks cruft
> scsi: ufs: mediatek: Use the common PHY framework
> scsi: ufs: mediatek: Switch to newer PM ops helpers
> scsi: ufs: mediatek: Remove mediatek,ufs-broken-rtc property
> scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths
> scsi: ufs: mediatek: Add vendor prefix to clk-scale-up-vcore-min
> scsi: ufs: mediatek: Clean up logging prints
> scsi: ufs: mediatek: Rework ufs_mtk_wait_idle_state
> scsi: ufs: mediatek: Don't acquire dvfsrc-vcore twice
> scsi: ufs: mediatek: Rework hardware version reading
> scsi: ufs: mediatek: Back up idle timer in per-instance struct
> scsi: ufs: mediatek: Make scale_us in setup_clk_gating const
> scsi: ufs: mediatek: Remove ret local from link_startup_notify
> scsi: ufs: mediatek: Add MT8196 compatible, update copyright
>
> .../devicetree/bindings/phy/mediatek,ufs-phy.yaml | 16 +
> .../devicetree/bindings/ufs/mediatek,ufs.yaml | 196 ++++-
> drivers/phy/mediatek/phy-mtk-ufs.c | 71 ++
> drivers/ufs/host/ufs-mediatek-sip.h | 9 -
> drivers/ufs/host/ufs-mediatek.c | 935 +++++++++------------
> drivers/ufs/host/ufs-mediatek.h | 17 +-
> include/linux/soc/mediatek/mtk_sip_svc.h | 3 +
> 7 files changed, 650 insertions(+), 597 deletions(-)
> ---
> base-commit: a92c761bcac3d5042559107fa7679470727a4bcb
> change-id: 20251014-mt8196-ufs-cec4b9a97e53
>
> Best regards,
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