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Message-ID: <cd436879784d6843a32c12abff9f9a60d4c6da93.camel@gmail.com>
Date: Thu, 23 Oct 2025 23:18:43 +0200
From: Alexander Sverdlin <alexander.sverdlin@...il.com>
To: Longbin Li <looong.bin@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Chen Wang <unicorn_wang@...look.com>, Inochi Amaoto
<inochiama@...il.com>, Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt
<palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti
<alex@...ti.fr>, Thomas Bonnefille <thomas.bonnefille@...tlin.com>, Ze
Huang <huangze@...t.edu.cn>
Cc: devicetree@...r.kernel.org, sophgo@...ts.linux.dev,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 2/3] riscv: dts: sophgo: Add syscon node for cv18xx
Hi Longbin,
On Mon, 2025-10-20 at 16:38 +0800, Longbin Li wrote:
> Add top syscon node and all subdevice nodes for cv18xx series SoC.
>
> Co-authored-by: Inochi Amaoto <inochiama@...il.com>
> Signed-off-by: Longbin Li <looong.bin@...il.com>
Successfully tested in host mode on Milk-V Duo Module 01 EVB:
Tested-by: Alexander Sverdlin <alexander.sverdlin@...il.com>
(please don't forget to take this tag into your v4 if it still will apply)
> ---
> arch/riscv/boot/dts/sophgo/cv180x.dtsi | 26 ++++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
--
Alexander Sverdlin.
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