lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251024-polyester-gatherer-e7f5e4300262@spud>
Date: Fri, 24 Oct 2025 22:47:34 +0100
From: Conor Dooley <conor@...nel.org>
To: Ulf Hansson <ulf.hansson@...aro.org>
Cc: hehuan1@...incomputing.com, robh@...nel.org, krzk+dt@...nel.org,
	conor+dt@...nel.org, jszhang@...nel.org, adrian.hunter@...el.com,
	p.zabel@...gutronix.de, linux-mmc@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	ningyu@...incomputing.com, linmin@...incomputing.com,
	pinkesh.vaghela@...fochips.com, xuxiang@...incomputing.com,
	luyulin@...incomputing.com, dongxuyang@...incomputing.com,
	zhangsenchuan@...incomputing.com, weishangjuan@...incomputing.com,
	lizhi2@...incomputing.com, caohang@...incomputing.com,
	Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v5 1/2] dt-bindings: mmc: sdhci-of-dwcmshc: Add Eswin
 EIC7700

On Fri, Oct 24, 2025 at 05:37:59PM +0100, Conor Dooley wrote:
> On Fri, Oct 24, 2025 at 03:57:33PM +0200, Ulf Hansson wrote:
> > On Sun, 19 Oct 2025 at 13:52, <hehuan1@...incomputing.com> wrote:
> > >
> > > From: Huan He <hehuan1@...incomputing.com>
> > >
> > > EIC7700 use Synopsys dwcmshc IP for SD/eMMC controllers.
> > > Add Eswin EIC7700 support in sdhci-of-dwcmshc.yaml.
> > >
> > > Signed-off-by: Huan He <hehuan1@...incomputing.com>
> > > Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
> > > ---
> > >  .../bindings/mmc/snps,dwcmshc-sdhci.yaml      | 57 +++++++++++++++++--
> > >  1 file changed, 51 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> > > index f882219a0a26..7e7c55dc2440 100644
> > > --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> > > +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> > > @@ -30,6 +30,7 @@ properties:
> > >            - sophgo,sg2002-dwcmshc
> > >            - sophgo,sg2042-dwcmshc
> > >            - thead,th1520-dwcmshc
> > > +          - eswin,eic7700-dwcmshc
> > >
> > >    reg:
> > >      maxItems: 1
> > > @@ -52,17 +53,30 @@ properties:
> > >      maxItems: 5
> > >
> > >    reset-names:
> > > -    items:
> > > -      - const: core
> > > -      - const: bus
> > > -      - const: axi
> > > -      - const: block
> > > -      - const: timer
> > > +    maxItems: 5
> > >
> > >    rockchip,txclk-tapnum:
> > >      description: Specify the number of delay for tx sampling.
> > >      $ref: /schemas/types.yaml#/definitions/uint8
> > >
> > > +  eswin,hsp-sp-csr:
> > > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > > +    items:
> > > +      - items:
> > > +          - description: Phandle to HSP(High-Speed Peripheral) device
> > > +          - description: Offset of the stability status register for internal
> > > +                         clock.
> > > +          - description: Offset of the stability register for host regulator
> > > +                         voltage.
> > > +    description:
> > > +      HSP CSR is to control and get status of different high-speed peripherals
> > > +      (such as Ethernet, USB, SATA, etc.) via register, which can tune
> > > +      board-level's parameters of PHY, etc.
> > 
> > I would like second confirmation from DT maintainers, to make sure
> > it's reasonable to model the HW like this.
> 
> If by second confirmation, you mean by someone other than me, obviously
> ignore this, but I think this is "fine". It discussed on a previous
> revision that all is being done with it is setting a handful bits that
> signify that the peripheral has been configured correctly.
> 
> That said, I don't have a clue what's going on with the warning about
> the dwmac device. That's definitely one for Rob.

Apparently it's just as simple as there being more than one definition
of the same property. I had it in my head that that was okay when only
one binding was applied to the node, but clearly not.

I'll have to un-review it until that error is sorted out.


> > In principle the phandle above gets translated into a regmap via a
> > call to syscon_node_to_regmap() in the driver, to allow some registers
> > to be written that are outside the controllers address space.
> > 
> > > +
> > > +  eswin,drive-impedance-ohms:
> > > +    description: Specifies the drive impedance in Ohm.
> > > +    enum: [33, 40, 50, 66, 100]
> > > +
> > >  required:
> > >    - compatible
> > >    - reg
> > > @@ -110,6 +124,37 @@ allOf:
> > >              - const: block
> > >              - const: timer
> > >
> > > +  - if:
> > > +      properties:
> > > +        compatible:
> > > +          contains:
> > > +            const: eswin,eic7700-dwcmshc
> > > +    then:
> > > +      properties:
> > > +        resets:
> > > +          minItems: 4
> > > +          maxItems: 4
> > > +        reset-names:
> > > +          items:
> > > +            - const: axi
> > > +            - const: phy
> > > +            - const: prstn
> > > +            - const: txrx
> > > +      required:
> > > +        - eswin,hsp-sp-csr
> > > +        - eswin,drive-impedance-ohms
> > > +    else:
> > > +      properties:
> > > +        resets:
> > > +          maxItems: 5
> > > +        reset-names:
> > > +          items:
> > > +            - const: core
> > > +            - const: bus
> > > +            - const: axi
> > > +            - const: block
> > > +            - const: timer
> > > +
> > >    - if:
> > >        properties:
> > >          compatible:
> > > --
> > > 2.25.1
> > >
> > 
> > Kind regards
> > Uffe



Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ