linux-kernel - Re: (subset) [PATCH v8 0/5] PCI: dwc: Add ECAM support with iATU configuration

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Message-ID: <176160465177.73268.9869510926279916233.b4-ty@kernel.org>
Date: Mon, 27 Oct 2025 17:37:06 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: cros-qcom-dts-watchers@...omium.org,
	Konrad Dybcio <konradybcio@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Manivannan Sadhasivam <mani@...nel.org>,
	Krzysztof Wilczyński <kwilczynski@...nel.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Jingoo Han <jingoohan1@...il.com>,
	Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
Cc: linux-arm-msm@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org,
	quic_vbadigan@...cinc.com,
	quic_mrana@...cinc.com,
	quic_vpernami@...cinc.com,
	mmareddy@...cinc.com,
	Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: (subset) [PATCH v8 0/5] PCI: dwc: Add ECAM support with iATU configuration


On Thu, 28 Aug 2025 13:04:21 +0530, Krishna Chaitanya Chundru wrote:
> The current implementation requires iATU for every configuration
> space access which increases latency & cpu utilization.
> 
> Designware databook 5.20a, section 3.10.10.3 says about CFG Shift Feature,
> which shifts/maps the BDF (bits [31:16] of the third header DWORD, which
> would be matched against the Base and Limit addresses) of the incoming
> CfgRd0/CfgWr0 down to bits[27:12]of the translated address.
> 
> [...]

Applied, thanks!

[1/5] arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature
      commit: 03e928442d469f7d8dafc549638730647202d9ce

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>