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Message-ID: <20251027081806.qoogsX3l@linutronix.de>
Date: Mon, 27 Oct 2025 09:18:06 +0100
From: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
To: Lukas Wunner <lukas@...ner.de>
Cc: Crystal Wood <crwood@...hat.com>, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Peter Zijlstra <peterz@...radead.org>,
Juri Lelli <juri.lelli@...hat.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
Clark Williams <clrkwllms@...nel.org>,
Steven Rostedt <rostedt@...dmis.org>,
Dietmar Eggemann <dietmar.eggemann@....com>,
Ben Segall <bsegall@...gle.com>, Mel Gorman <mgorman@...e.de>,
Valentin Schneider <vschneid@...hat.com>,
linux-kernel@...r.kernel.org, Attila Fazekas <afazekas@...hat.com>,
linux-pci@...r.kernel.org, linux-rt-devel@...ts.linux.dev,
Bjorn Helgaas <helgaas@...nel.org>,
Mahesh J Salgaonkar <mahesh@...ux.ibm.com>,
Oliver OHalloran <oohall@...il.com>
Subject: Re: [PATCH] genirq/manage: Reduce priority of forced secondary IRQ
handler
On 2025-10-27 07:40:46 [+0100], Lukas Wunner wrote:
> > I suspect it was a non-issue because of IRQCHIP_ONESHOT_SAFE disabling
> > the forced oneshot (the other irq was pciehp). Given that these are
> > pcie-specific, do they ever get used without MSI (which sets
> > IRQCHIP_ONESHOT_SAFE)[1]?
>
> It seems fragile to depend on IRQCHIP_ONESHOT_SAFE. What about irqchips
> which don't set that? What about PCIe ports which use legacy INTx
> instead of MSI?
exactly.
> Long story short, I'll respin the patch to reduce the forced secondary
> thread's priority, taking into account Thomas' feedback.
> (Apologies for not having done this earlier.)
no worries, thanks for the spin up.
> Thanks,
>
> Lukas
Sebastian
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