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Message-ID: <241e4a1d-039c-4738-b492-6325ad354b2e@kwiboo.se>
Date: Thu, 30 Oct 2025 14:55:12 +0100
From: Jonas Karlman <jonas@...boo.se>
To: Elaine Zhang <zhangqing@...k-chips.com>
Cc: mturquette@...libre.com, sboyd@...nel.org, sugar.zhang@...k-chips.com,
heiko@...ech.de, robh@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
huangtao@...k-chips.com, finley.xiao@...k-chips.com
Subject: Re: [PATCH v5 6/7] dt-bindings: clock: rockchip: Add RK3506 clock and
reset unit
Hi Elaine,
On 10/27/2025 9:41 AM, Elaine Zhang wrote:
> From: Finley Xiao <finley.xiao@...k-chips.com>
>
> Add device tree bindings for clock and reset unit on RK3506 SoC.
> Add clock and reset IDs for RK3506 SoC.
>
> Signed-off-by: Finley Xiao <finley.xiao@...k-chips.com>
> ---
> .../bindings/clock/rockchip,rk3506-cru.yaml | 51 ++++
> .../dt-bindings/clock/rockchip,rk3506-cru.h | 285 ++++++++++++++++++
> .../dt-bindings/reset/rockchip,rk3506-cru.h | 211 +++++++++++++
> 3 files changed, 547 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3506-cru.yaml
> create mode 100644 include/dt-bindings/clock/rockchip,rk3506-cru.h
> create mode 100644 include/dt-bindings/reset/rockchip,rk3506-cru.h
[snip]
> diff --git a/include/dt-bindings/reset/rockchip,rk3506-cru.h b/include/dt-bindings/reset/rockchip,rk3506-cru.h
> new file mode 100644
> index 000000000000..f38cc066009b
> --- /dev/null
> +++ b/include/dt-bindings/reset/rockchip,rk3506-cru.h
> @@ -0,0 +1,211 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2023-2025 Rockchip Electronics Co., Ltd.
> + * Author: Finley Xiao <finley.xiao@...k-chips.com>
> + */
> +
> +#ifndef _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
> +#define _DT_BINDINGS_REST_ROCKCHIP_RK3506_H
> +
> +/* CRU-->SOFTRST_CON00 */
> +#define SRST_NCOREPORESET0_AC 0
> +#define SRST_NCOREPORESET1_AC 1
> +#define SRST_NCOREPORESET2_AC 2
> +#define SRST_NCORESET0_AC 3
> +#define SRST_NCORESET1_AC 4
> +#define SRST_NCORESET2_AC 5
> +#define SRST_NL2RESET_AC 6
> +#define SRST_ARESETN_CORE_BIU_AC 7
> +#define SRST_HRESETN_M0_AC 8
> +
> +/* CRU-->SOFTRST_CON02 */
> +#define SRST_NDBGRESET 9
> +#define SRST_PRESETN_CORE_BIU 10
> +#define SRST_RESETN_PMU 11
> +
> +/* CRU-->SOFTRST_CON03 */
> +#define SRST_PRESETN_DBG 12
> +#define SRST_POTRESETN_DBG 13
> +#define SRST_PRESETN_CORE_GRF 14
> +#define SRST_RESETN_CORE_EMA_DETECT 15
> +#define SRST_RESETN_REF_PVTPLL_CORE 16
> +#define SRST_PRESETN_GPIO1 17
> +#define SRST_DBRESETN_GPIO1 18
> +
> +/* CRU-->SOFTRST_CON04 */
> +#define SRST_ARESETN_CORE_PERI_BIU 19
> +#define SRST_ARESETN_DSMC 20
> +#define SRST_PRESETN_DSMC 21
> +#define SRST_RESETN_FLEXBUS 22
> +#define SRST_ARESETN_FLEXBUS 23
> +#define SRST_HRESETN_FLEXBUS 24
> +#define SRST_ARESETN_DSMC_SLV 25
> +#define SRST_HRESETN_DSMC_SLV 26
> +#define SRST_RESETN_DSMC_SLV 27
> +
> +/* CRU-->SOFTRST_CON05 */
> +#define SRST_ARESETN_BUS_BIU 28
> +#define SRST_HRESETN_BUS_BIU 29
> +#define SRST_PRESETN_BUS_BIU 30
> +#define SRST_ARESETN_SYSRAM 31
> +#define SRST_HRESETN_SYSRAM 32
> +#define SRST_ARESETN_DMAC0 33
> +#define SRST_ARESETN_DMAC1 34
> +#define SRST_HRESETN_M0 35
> +#define SRST_RESETN_M0_JTAG 36
> +#define SRST_HRESETN_CRYPTO 37
Is there a reason why this (and the RV1126B) reset names now include the
RESETN name in all reset constant?
For RK3528 and prior mainline SoCs the RESETN part of the name has been
striped from the constant, suggest we also strip the RESETN part for
RK3506 and RV1126B for consistency with other RK SoCs.
Regards,
Jonas
[snip]
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