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Message-Id: <20251031-optimize_pll_driver-v3-1-92f3b2f36a83@amlogic.com>
Date: Fri, 31 Oct 2025 16:10:08 +0800
From: Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@...nel.org>
To: Neil Armstrong <neil.armstrong@...aro.org>,
Jerome Brunet <jbrunet@...libre.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Kevin Hilman <khilman@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Cc: linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Chuan Liu <chuan.liu@...ogic.com>
Subject: [PATCH v3 1/4] clk: amlogic: Fix out-of-range PLL frequency
setting
From: Chuan Liu <chuan.liu@...ogic.com>
If the calculated 'm' falls into the range:
pll->range->max < m < (1 << pll->m.width)
Here an incorrect 'm' value could be obtained, so an additional
condition is added to ensure that the calculated 'm' stays within a
valid range.
Fixes: 8eed1db1adec6 ("clk: meson: pll: update driver for the g12a")
Signed-off-by: Chuan Liu <chuan.liu@...ogic.com>
---
drivers/clk/meson/clk-pll.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index 1ea6579a760f..629f6af18ea1 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -191,7 +191,7 @@ static int meson_clk_get_pll_range_index(unsigned long rate,
*m = meson_clk_get_pll_range_m(rate, parent_rate, *n, pll);
/* the pre-divider gives a multiplier too big - stop */
- if (*m >= (1 << pll->m.width))
+ if (*m > pll->range->max || *m >= (1 << pll->m.width))
return -EINVAL;
return 0;
--
2.42.0
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