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Message-ID: <cover.1761893824.git.adrianhoyin.ng@altera.com>
Date: Fri, 31 Oct 2025 16:27:28 +0800
From: adrianhoyin.ng@...era.com
To: alexandre.belloni@...tlin.com,
	Frank.Li@....com,
	wsa+renesas@...g-engineering.com,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	dinguyen@...nel.org,
	linux-i3c@...ts.infradead.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Cc: adrianhoyin.ng@...era.com
Subject: [RFC PATCH v2 0/3] i3c: dw: Add Altera SoCFPGA runtime PM disable quirk

From: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>

This patchset adds support for an Altera SoCFPGA-specific quirk
in the Synopsys DesignWare I3C master driver.

While running the I3C compliance test suite on the Altera Agilex5 SoCFPGA,
the I3C bus was observed to hang when a slave device issued an IBI after
the Dynamic Address Assignment (DAA) process completed.

This issue occurs because the controller enters a suspended state after
DAA due to runtime PM being enabled. When suspended, the controller stops
driving the SCL line. As a result, an IBI transfer cannot complete, leaving
the SDA line stuck low and the bus in a hung state.

To address this issue, a new compatible string,
"altr,socfpga-dw-i3c-master", is introduced to identify the
SoCFPGA variant. When this compatible string is matched, a new
quirk (DW_I3C_DISABLE_RUNTIME_PM_QUIRK) disables all runtime PM
operations in the driver, ensuring the controller remains active
to handle IBI transactions reliably.

---
changelog:
v1->v2:
*Add new compatible string in dw i3c dt binding.
*Added new compatible string for altr socfpga platform.
*Remove Kconfig that disables runtime PM added in v1.
*Update implementation to disable runtime PM via compatible string
match

See previous patch series at:
https://lore.kernel.org/all/22286d459959f2a153ac59d7da46794c0f495c77.1760579799.git.adrianhoyin.ng@altera.com/ 
---.

Adrian Ng Ho Yin (3):
  dt-bindings: i3c: snps: Add Altera SoCFPGA compatible
  arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers
  i3c: dw: Add runtime PM disable quirk for Altera SoCFPGA

 .../bindings/i3c/snps,dw-i3c-master.yaml      |   6 +-
 .../arm64/boot/dts/intel/socfpga_agilex5.dtsi |   6 +-
 drivers/i3c/master/dw-i3c-master.c            | 176 +++++++++++-------
 3 files changed, 115 insertions(+), 73 deletions(-)

-- 
2.49.GIT


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