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Message-ID: <e6ae69155785f160ea43b5e8be23c358cc8e1653.1761893824.git.adrianhoyin.ng@altera.com>
Date: Fri, 31 Oct 2025 16:27:30 +0800
From: adrianhoyin.ng@...era.com
To: alexandre.belloni@...tlin.com,
	Frank.Li@....com,
	wsa+renesas@...g-engineering.com,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	dinguyen@...nel.org,
	linux-i3c@...ts.infradead.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Cc: adrianhoyin.ng@...era.com
Subject: [RFC PATCH-v2 2/3] arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers

From: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>

Add the "altr,socfpga-dw-i3c-master" compatible string to the
I3C controller nodes on the Agilex5 SoCFPGA platform. This allows
the platform to use the generic Synopsys DW I3C master driver while
enabling platform-specific quirks or configurations associated with
Altera SoCFPGA devices.

Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 04e99cd7e74b..0e9332107ddb 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -203,7 +203,8 @@ i2c4: i2c@...02c00 {
 		};
 
 		i3c0: i3c@...a0000 {
-			compatible = "snps,dw-i3c-master-1.00a";
+			compatible = "altr,socfpga-dw-i3c-master",
+						"snps,dw-i3c-master-1.00a";
 			reg = <0x10da0000 0x1000>;
 			#address-cells = <3>;
 			#size-cells = <0>;
@@ -213,7 +214,8 @@ i3c0: i3c@...a0000 {
 		};
 
 		i3c1: i3c@...a1000 {
-			compatible = "snps,dw-i3c-master-1.00a";
+			compatible = "altr,socfpga-dw-i3c-master",
+						"snps,dw-i3c-master-1.00a";
 			reg = <0x10da1000 0x1000>;
 			#address-cells = <3>;
 			#size-cells = <0>;
-- 
2.49.GIT


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