linux-kernel - [PATCH] riscv: Update MIPS vendor id to 0x127.

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Message-Id: <20251103-mips-vendorid-v1-1-4fcb5f4d53fe@htecgroup.com>
Date: Mon, 03 Nov 2025 16:05:48 +0100
From: Aleksa Paunovic via B4 Relay <devnull+aleksa.paunovic.htecgroup.com@...nel.org>
To: Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt <palmer@...belt.com>, 
 Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>
Cc: Djordje Todorovic <djordje.todorovic@...cgroup.com>, 
 linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
 Chao-ying Fu <cfu@...ecomp.com>, 
 Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
Subject: [PATCH] riscv: Update MIPS vendor id to 0x127.

From: Chao-ying Fu <cfu@...ecomp.com>

[1] defines MIPS vendor id as 0x127.

[1] https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf

Fixes: a8fed1bc03ace27902338e4f0d318335883ac847 ("riscv: Add xmipsexectl as a vendor extension")
Signed-off-by: Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
---
 arch/riscv/include/asm/vendorid_list.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h
index 3b09874d7a6dfb8f8aa45b0be41c20711d539e78..55205f7938055ba2b744dba5118bba935bcac008 100644
--- a/arch/riscv/include/asm/vendorid_list.h
+++ b/arch/riscv/include/asm/vendorid_list.h
@@ -9,6 +9,6 @@
 #define MICROCHIP_VENDOR_ID	0x029
 #define SIFIVE_VENDOR_ID	0x489
 #define THEAD_VENDOR_ID		0x5b7
-#define MIPS_VENDOR_ID		0x722
+#define MIPS_VENDOR_ID		0x127

 #endif

---
base-commit: dcb6fa37fd7bc9c3d2b066329b0d27dedf8becaa
change-id: 20251031-mips-vendorid-df103aedf117

Best regards,
-- 
Aleksa Paunovic <aleksa.paunovic@...cgroup.com>