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Message-ID: <20251103-tabby-laurel-bc895f236a69@spud>
Date: Mon, 3 Nov 2025 22:07:50 +0000
From: Conor Dooley <conor@...nel.org>
To: Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
Cc: Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
Djordje Todorovic <djordje.todorovic@...cgroup.com>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
Chao-ying Fu <cfu@...ecomp.com>
Subject: Re: [PATCH] riscv: Update MIPS vendor id to 0x127.
On Mon, Nov 03, 2025 at 04:05:48PM +0100, Aleksa Paunovic wrote:
> From: Chao-ying Fu <cfu@...ecomp.com>
>
> [1] defines MIPS vendor id as 0x127.
>
> [1] https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf
>
> Fixes: a8fed1bc03ace27902338e4f0d318335883ac847 ("riscv: Add xmipsexectl as a vendor extension")
Incorrect format for fixes tags!
> Signed-off-by: Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
> ---
> arch/riscv/include/asm/vendorid_list.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h
> index 3b09874d7a6dfb8f8aa45b0be41c20711d539e78..55205f7938055ba2b744dba5118bba935bcac008 100644
> --- a/arch/riscv/include/asm/vendorid_list.h
> +++ b/arch/riscv/include/asm/vendorid_list.h
> @@ -9,6 +9,6 @@
> #define MICROCHIP_VENDOR_ID 0x029
> #define SIFIVE_VENDOR_ID 0x489
> #define THEAD_VENDOR_ID 0x5b7
> -#define MIPS_VENDOR_ID 0x722
> +#define MIPS_VENDOR_ID 0x127
How was this ever wrong? Do devices exist with this old ID? Do we need
to support both as vendor IDs for MIPS?
Also, this was added in the wrong point in the list (it's meant to be
alphanumeric order IIRC). Sorting by the ID makes things annoying to
humans to read.
>
> #endif
>
> ---
> base-commit: dcb6fa37fd7bc9c3d2b066329b0d27dedf8becaa
> change-id: 20251031-mips-vendorid-df103aedf117
>
> Best regards,
> --
> Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
>
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