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Message-Id: <20251103-dt-bindings-pci-qcom-v1-10-c0f6041abf9b@linaro.org>
Date: Mon, 03 Nov 2025 16:14:50 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kwilczynski@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH 10/12] dt-bindings: PCI: qcom,pcie-apq8064: Move APQ8064 to
dedicated schema
Move APQ8064 and IPQ8064 PCIe devices from qcom,pcie.yaml binding to a
dedicated file to make reviewing and maintenance easier.
New schema is equivalent to the old one with few changes:
- Adding a required compatible, which is actually redundant.
- Drop the really obvious comments next to clock/reg/reset-names items.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
.../devicetree/bindings/pci/qcom,pcie-apq8064.yaml | 170 +++++++++++++++++++++
.../devicetree/bindings/pci/qcom,pcie.yaml | 127 ---------------
2 files changed, 170 insertions(+), 127 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-apq8064.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-apq8064.yaml
new file mode 100644
index 000000000000..eb5b81d1defc
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-apq8064.yaml
@@ -0,0 +1,170 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/qcom,pcie-apq8064.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm APQ8064/IPQ8064 PCI Express Root Complex
+
+maintainers:
+ - Bjorn Andersson <andersson@...nel.org>
+ - Manivannan Sadhasivam <mani@...nel.org>
+
+properties:
+ compatible:
+ enum:
+ - qcom,pcie-apq8064
+ - qcom,pcie-ipq8064
+ - qcom,pcie-ipq8064-v2
+
+ reg:
+ maxItems: 4
+
+ reg-names:
+ items:
+ - const: dbi
+ - const: elbi
+ - const: parf
+ - const: config
+
+ clocks:
+ minItems: 3
+ maxItems: 5
+
+ clock-names:
+ minItems: 3
+ items:
+ - const: core # Clocks the pcie hw block
+ - const: iface # Configuration AHB clock
+ - const: phy
+ - const: aux
+ - const: ref
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ items:
+ - const: msi
+
+ resets:
+ minItems: 5
+ maxItems: 6
+
+ reset-names:
+ minItems: 5
+ items:
+ - const: axi
+ - const: ahb
+ - const: por
+ - const: pci
+ - const: phy
+ - const: ext
+
+ vdda-supply:
+ description: A phandle to the core analog power supply
+
+ vdda_phy-supply:
+ description: A phandle to the core analog power supply for PHY
+
+ vdda_refclk-supply:
+ description: A phandle to the core analog power supply for IC which generates reference clock
+
+required:
+ - resets
+ - reset-names
+ - vdda-supply
+ - vdda_phy-supply
+ - vdda_refclk-supply
+
+allOf:
+ - $ref: qcom,pcie-common.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,pcie-apq8064
+ then:
+ properties:
+ clocks:
+ maxItems: 3
+ clock-names:
+ maxItems: 3
+ resets:
+ maxItems: 5
+ reset-names:
+ maxItems: 5
+ else:
+ properties:
+ clocks:
+ minItems: 5
+ clock-names:
+ minItems: 5
+ resets:
+ minItems: 6
+ reset-names:
+ minItems: 6
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-msm8960.h>
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/reset/qcom,gcc-msm8960.h>
+
+ pcie@...00000 {
+ compatible = "qcom,pcie-apq8064";
+ reg = <0x1b500000 0x1000>,
+ <0x1b502000 0x80>,
+ <0x1b600000 0x100>,
+ <0x0ff00000 0x100000>;
+ reg-names = "dbi", "elbi", "parf", "config";
+ ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00100000>, /* I/O */
+ <0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* mem */
+
+ device_type = "pci";
+ linux,pci-domain = <0>;
+ bus-range = <0x00 0xff>;
+ num-lanes = <1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ clocks = <&gcc PCIE_A_CLK>,
+ <&gcc PCIE_H_CLK>,
+ <&gcc PCIE_PHY_REF_CLK>;
+ clock-names = "core", "iface", "phy";
+
+ interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &intc GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+ <0 0 0 2 &intc GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+ <0 0 0 3 &intc GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+ <0 0 0 4 &intc GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+
+ resets = <&gcc PCIE_ACLK_RESET>,
+ <&gcc PCIE_HCLK_RESET>,
+ <&gcc PCIE_POR_RESET>,
+ <&gcc PCIE_PCI_RESET>,
+ <&gcc PCIE_PHY_RESET>;
+ reset-names = "axi", "ahb", "por", "pci", "phy";
+
+ perst-gpios = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
+ vdda-supply = <&pm8921_s3>;
+ vdda_phy-supply = <&pm8921_lvs6>;
+ vdda_refclk-supply = <&v3p3_fixed>;
+
+ pcie@0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 8be10d950616..a42e665a23a8 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -18,10 +18,7 @@ properties:
compatible:
oneOf:
- enum:
- - qcom,pcie-apq8064
- qcom,pcie-apq8084
- - qcom,pcie-ipq8064
- - qcom,pcie-ipq8064-v2
- qcom,pcie-msm8996
- items:
- const: qcom,pcie-msm8998
@@ -78,12 +75,6 @@ properties:
vdda-supply:
description: A phandle to the core analog power supply
- vdda_phy-supply:
- description: A phandle to the core analog power supply for PHY
-
- vdda_refclk-supply:
- description: A phandle to the core analog power supply for IC which generates reference clock
-
vddpe-3v3-supply:
description: A phandle to the PCIe endpoint power supply
@@ -127,26 +118,6 @@ anyOf:
allOf:
- $ref: /schemas/pci/pci-host-bridge.yaml#
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,pcie-apq8064
- - qcom,pcie-ipq8064
- - qcom,pcie-ipq8064v2
- then:
- properties:
- reg:
- minItems: 4
- maxItems: 4
- reg-names:
- items:
- - const: dbi # DesignWare PCIe registers
- - const: elbi # External local bus interface registers
- - const: parf # Qualcomm specific registers
- - const: config # PCIe configuration space
-
- if:
properties:
compatible:
@@ -168,44 +139,6 @@ allOf:
- const: config # PCIe configuration space
- const: mhi # MHI registers
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,pcie-apq8064
- - qcom,pcie-ipq8064
- - qcom,pcie-ipq8064v2
- then:
- properties:
- clocks:
- minItems: 3
- maxItems: 5
- clock-names:
- minItems: 3
- items:
- - const: core # Clocks the pcie hw block
- - const: iface # Configuration AHB clock
- - const: phy # Clocks the pcie PHY block
- - const: aux # Clocks the pcie AUX block, not on apq8064
- - const: ref # Clocks the pcie ref block, not on apq8064
- resets:
- minItems: 5
- maxItems: 6
- reset-names:
- minItems: 5
- items:
- - const: axi # AXI reset
- - const: ahb # AHB reset
- - const: por # POR reset
- - const: pci # PCI reset
- - const: phy # PHY reset
- - const: ext # EXT reset, not on apq8064
- required:
- - vdda-supply
- - vdda_phy-supply
- - vdda_refclk-supply
-
- if:
properties:
compatible:
@@ -250,19 +183,6 @@ allOf:
resets: false
reset-names: false
- - if:
- not:
- properties:
- compatible:
- contains:
- enum:
- - qcom,pcie-apq8064
- - qcom,pcie-ipq8064
- - qcom,pcie-ipq8064v2
- then:
- required:
- - power-domains
-
- if:
not:
properties:
@@ -312,10 +232,7 @@ allOf:
compatible:
contains:
enum:
- - qcom,pcie-apq8064
- qcom,pcie-apq8084
- - qcom,pcie-ipq8064
- - qcom,pcie-ipq8064-v2
then:
properties:
interrupts:
@@ -327,50 +244,6 @@ allOf:
unevaluatedProperties: false
examples:
- - |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pcie@...00000 {
- compatible = "qcom,pcie-ipq8064";
- reg = <0x1b500000 0x1000>,
- <0x1b502000 0x80>,
- <0x1b600000 0x100>,
- <0x0ff00000 0x100000>;
- reg-names = "dbi", "elbi", "parf", "config";
- device_type = "pci";
- linux,pci-domain = <0>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>,
- <0x82000000 0 0 0x08000000 0 0x07e00000>;
- interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc 41>,
- <&gcc 43>,
- <&gcc 44>,
- <&gcc 42>,
- <&gcc 248>;
- clock-names = "core", "iface", "phy", "aux", "ref";
- resets = <&gcc 27>,
- <&gcc 26>,
- <&gcc 25>,
- <&gcc 24>,
- <&gcc 23>,
- <&gcc 22>;
- reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
- pinctrl-0 = <&pcie_pins_default>;
- pinctrl-names = "default";
- vdda-supply = <&pm8921_s3>;
- vdda_phy-supply = <&pm8921_lvs6>;
- vdda_refclk-supply = <&ext_3p3v>;
- };
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
--
2.48.1
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